Kenwood RXD-M35 Service Manual page 10

RXD-M35
QQ
3 7 63 1515 0
Pin No. Pin Name
50 AVDD2
51 AVSS2
52 EFM/CK384
53 PCK/DSLB
54 VCOF2
55 SUBC
56 SBCK
57 VSS
58 X1
59 X2
60 VDD
61 BYTCK
62 CLDCK
63 FCLK
64 IPFLAG
65 FLAG
66 CLVS
67 CRC
TE
L 13942296513
68 DEMPH
69 RESY
70 IOSEL
71 TEST
72 AVDD1
73 OUTL
74 AVSS1
75 OUTR
76 RSEL
77 CSEL
78 PSEL
79 MSEL
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80 SSEL
10
CIRCUIT DESCRIPTION
I/O
- Analog power supply for DSL, PLL, and DA output section.
- Analog ground for DSL, PLL, and DA output section.
EFM signal output when IOSEL is H.
O
16.9344MHz clock output when IOSEL is L.
O PLL clock output (fPCK = 4.3218MHz) or DSL balance output.
I/O Jitter free VCO loop filter pin.
O Sub code serial output.
I Clock input for sub code serial output.
- GND
I Crystal oscillation circuit input.
O Crystal oscillation circuit output.
- Power supply for crystal oscillation circuit.
Bite clock signal output when IOSEL is H.
O
Traverse stop signal output when IOSEL is L.
General IO pin when default.
O Sub code frame clock signal output (fCLDCK = 7.35kHz) when
command is carry out.
General IO pin when default.
O Crystal frame clock signal output (fFCLK = 7.35kHz) when
command is carry out.
O Interpolation flag signal output.
O Flag signal output.
O Spindle servo phase synchronism signal output.
O Sub code CRC checked output.
O De-emphasis detection signal output.
Re-frame synchronism signal RESY output of frame synchronism
O when IOSEL is H.
H : Synchronized
I Switching pin for mode.
I Test pin.
- Analog power supply for audio output section.
O L ch audio output.
- Analog ground for audio output section.
O R ch audio output.
• RF signal polarity assignment pin when default.
RSEL is H when bright level is H.
I RSEL is L when bright level is L.
• General IO pin when command is executed.
RF signal polarity assignment is set by command.
Designation of oscillation frequency.
I
H : f = 33.8688MHz L : f = 16.9344MHz
Test pin (Normal : L ) when IOSEL is H.
I
SRDATA input when IOSEL is L.
SMCK output when IOSEL is H.
H : SMCK = 8.4672MHz
I L : SMCK = 4.2336MHz
LRCK input when IOSEL is L.
H : Lch data,
SMCK = 4.2336MHz (Fixed)
x ao
y
SUBQ output mode switching pin when IOSEL is H.
H : Q code buffer use mode
i
I L : CLDCK synchronism mode
BCLK input when IOSEL is L.
Q code buffer use mode
8
Pin Description
f =16.9344MHz, 33.8688MHz
f =16.9344MHz, 33.8688MHz
Q Q
3 6 7 1 3
L : Non synchronized
Switching pin of frequency.
L : Rch data
u163
.
2 9 9 4 2 8
Active
H
Stop
Mode
CLV
OK
1 5 0 5 8 2 9 9 4
ON
Normal
m
co
9 9
L
NG
2 8 9 9