Sony CDX-C90R Service Manual page 25

IC1 CXD8679Q (MAIN BOARD)
51 50 49
IF SELD 52
IF SELC 53
NC 54
SBCKI 55 ATT
4BIT DATA
SDATAR 56
IIR
BITSTREAM
SDATAL 57
NC 58
DFDTOL 59
FIR 1
DFBCKO 60
OVERFLOW DETECTOR
DFDTEN 61
TEST1 62
TEST2 63
VSS 64
1 2
3
IC3, 4 PCM1702U-J (MAIN BOARD)
INPUT
1
DATA
INTERFACE
&
CLOCK 2
SINE CONVERTER
CIRCUIT
3
NC
4
+VDD
BALANCED BALANCED
D.COM 5 CURRENT CURRENT
SEGMENT SEGMENT
6 DAC A
–VDD
7
L.E
NC 8
9
NC
10
NC
48 47 46 45 44
S / P
MODE
FIR 4
FIR 2 FIR 3 FIR 1
OVERFLOW DETECTOR
P/S CONVERT
&
D/F-CLK GEN.
DATA SELECT
4
5 6 7 8
20 –VCC
REFERENCE
19 REF DC
&
SERVO CIRCUIT
18 NC
17 SERVO DC
BY-POLAR
16 A.COM
OFFSET
CIRCUIT
DAC B 15 A.COM
14 I OUT
13 NC
12 BPO DC
11 +VCC
43 42 41 40 39
TIMING
CIRCUIT
ATT
IIR
FIR 4
FIR 2 FIR 3
DATA SELECT
2
12 13
9 10 11
IC103, 104 CS3310-KSR
ZCEN 1
2
CS
3
SDATAI
VD+ 4
DGND 5
SCLK 6
7
SDATAO
MUTE 8
– 65 –
38 37 36 35 34
OR
"0" DETECT
MUTE
CIRCUIT
3rd order
L . I . P.
NOISE
SHAPER
ATT
x 0.75
DITHER
ATT
x 0.75
3rd order
L . I . P. NOISE
SHAPER
POLALITY
CLOCK
GENERATOR
14 15 16 17 18
MUX 16 AINL
+
–
15 AGNDL
14 AOUTL
8 8
CONTROL
REGISTER
13 VA–
16
12 VA+
SERIAL
PARALLEL 8 8 8
REGISTER
11
AOUTR
10
AGNDR
MUX 9 AINR
33
32 INAF
31 OVFLAG
30 MUTER
29 MUTEL
28
MTPOL
27
DRPOL
26 MODE
25 NC
24 DFDTOR
23 DFLRCKO
22
TEST4
21 TEST3
20
VSS
19