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3-3. Main Block Diagram
24.567 MHz
Video
QD200
S - Video
VIDEO
Video Data (8bit)
DECODER
YPbPr Data (16bit)
Camera
QD100
Camera, HDTV, DVD
HDTV
A/D
DVD
(YPbPr)
Overlay Clock
Video Clock
EXT Clk in
Main Clock (input)
RGB
QD300
SYNC
A/D+PLL
RGB Data (48bit)
(RGB)
ZD004
80MHz OSC
QL020
TEMP SENSOR
QL021
TEMP SENSOR
Control BUS Signals
I/F
KEY SWITCH
CONTROLLER
LED
QL018
RAM
REMOTE
CONTROL
RECEIVER
(FRONT/REAR)
QD407
QD406
PLL for
Memory for
QD001
Overlay
Overlay
Tilt
Sensor
QD401
QD405
OSD
Timing GEN
GEN
Timing Generator
Data SW(YUV/YPbPr)
Form Convert(8bit
16bit)
Overtay Control
QD402
Tilt Sensor interace
2nd
PLL
HD, VD for LCD Panel
Panel Clock (TTL)
65X:65MHz 45X:40MHz
QD500
SCALER
Enlarge Shrink
RGB Signal
QD600
YUV
RGB convert
RGB Data (30bit)
D/A
Contrast Bright Control
Keystone Cortect
QD501-3
SD-RAM (16M)
QL015
RS232C
INTERFACE
QL005
MICRO
QL016
RS232C
INTERFACE
QL011
POWER
LAMP ON
CAMERA
EEPROM
ON
UNIT
Q407
Timing Signal
Level Shift
5V
15V
Timing Signal for LCD Panel
Q203
Q401, (402)*
Timing GEN
Sample & Hold
for LCD
Invert
Panel Clock (PECL)
65X:32.5MHz 45X:40MHz
Q507
Timing Signal
Level Shift
Q971
5V
15V
Shading
Correct
Q501, (502)*
Sample & Hold
Invert
Q701
Q607
Pre-Driver
Timing Signal
Gamma
Level Shift
Amp
5V
15V
Q601, (602)*
Sample&Hold
Invert
1H
1H
1H
11V
7V
QF001
PF006
FAN CONTROL
EXTERNAL
CONNECTOR
QF003
PF014
FAN CONTROL
3-3. Digital Block Diagram
RED
Panel
Video signal
(Y/Pb/Pr 8bit)
Y/Pb/Pr, HDTV signal
(Y,Pb/Pr 16bit)
GREEN
Panel
BLUE
Panel
RGB signal
(Each RGB 16bit : 48bit)
OPTICAL
ENGINE FAN
LAMP FAN
EXHAUST
FAN
INTAKE FAN
Fig. 2-3-3
PLL circuit for
overlay
Level
QD406
slice
Overlay signal
Memory
8bit
16bit
process
conv.
On-screen
On-screen
character
signal
generation
process
circuit
QD401
Various kinds of
timing signal
generation circuit
QD500
Y/Pb/Pr
RGB
Digital matrix
RGB signal
(Each RGB 10bit : 30bit)
On-screen signal
superimposing
Contrast / Brightness
Keystone
control
correction
Enlargement / Reduction
process
Memory
QD501-3
Fig. 2-3-4
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