Top View - Denon AVR-1708 Service Manual

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3 7 63 1515 0
Pin
Pin Name
No.
28 XOUT
29 XIN
30 DVDD
31 DGND
32 EMPHA/UO
33 AUDIO/VO
34 CKST
35 INT
36 RERR
37 DO
38 DI
39 CE
40 CL
41 XMODE
42 DGND
43 DVDD
44 TMCK/PIO0
45 TBCK/PIO1
46 TLRCK/PIO2
47 TDATA/PIO3
48 TXO/PIOEN
* For latch-up countermeasure, perform each power supply ON/OFF in the same timing.
BU2090F (IC302,1005,1008)
TE
L 13942296513
VSS 1
CONTROL CIRCUIT
DATA 2
12-bit SHIFT REGISTER
CLOCK 3
LCK
4
12-bit STRAGE REGISTER
Q0
5
O U T P U T B U FFE R (O P E N D R A IN )
6
Q1
Q2 7
8
Q3
9
Q4
MM74LCX244 (IC809-811)

TOP VIEW

1
OE
2
I0
3
O4
4
I1
5
O5
6
I2
7
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O6
8
I3
9
O7
10
GND
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I/O
O X'tal osc. connecting output terminal
I X'tal osc. connection, external clock input terminal (24.576MHz or 12.288MHz)
— Digital power
— Digital GND
I/O Emphasis information/U-data output/Chip address setting terminal
I/O Non-PCM detect/V-flag output/ Chip address setting terminal
I/O Clock switch transition period output/Demodulation master or slave function switching terminal
I/O Interrupt output for com (Interrupt factor selectable)/Modulation or general I/O switching terminal
O PLL lock error, data error flag output
O com I/F, read out data output terminal (3-state)
I com I/F, write data input terminal
I com I/F, chip enable input terminal
I com I/F, clock input terminal
I System reset input terminal
— Digital GND
— Digital power
I/O 256fs system clock input for modulation/General I/O in/output terminal
I/O 64fs bit clock input for modulation/General I/O in/output terminal
I/O fs clock input for modulation/General I/O in/output terminal
I/O Serial audio data input for modulation/General I/O in/output terminal
O/I Modulation data output/ General I/O enable input terminal
18
VDD
17 OE
16 Q11
15 Q10
Q9
14
13 Q8
12
Q7
Q6
11
Q5
10
20
VCC
19
OE2
18
O0
17
I4
16
O1
15
I5
14
O2
13
I6
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12
y
O3
11
I7
i
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AVR-1708/1508/688/588/488 AVC-1508
2 9
8
Function
Q Q
3 6 7 1 3 1 5
co
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42
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
9 9