Diagrams; Ic Pin Descriptions - Sony CDX-MP80 Service Manual

CDX-MP80

4-1. IC PIN DESCRIPTIONS

• IC5 CXD9684R-004 (AUDIO INTERFACE) (SERVO BOARD)
Pin No. Pin Name
1 RESET
2 MIMD
3 AD0
4 AD1
5 MIDIO (I2C SDA)
6 MICK (I2C SCL)
7 AD2
8 VDDT (3.3V)
9 SDO
10 AD3
11 AD4
12 SDI0
13 BCKIA
14 LRCKIA
15 AD5
16 CE
17 OE
18 VDD (2.5V)
19 STANDBY
20 VSS (2.5GND)
21 VSSL (2.5GND)
22 VRAL
23 LO
24 VDAL (2.5V)
25 VDAR (2.5V)
26 RO
27 VRAR
28 VSSR (2.5GND)
29 TESTP
30 CKS
31 AD12
32 AD11
33 AD10
34 AD9
35 VDDT (3.3V)
36 AD8
37 AD7
38 AD6
39 PO7
40 VSS
41 AD13
42 AD14
43 WR
44 AD16
45 AD15
46 IO0
47 IO1
48 VSS
49 IO2
50 IO3
51 IO4
14
SECTION 4

DIAGRAMS

I/O
I Reset input
I CPU interface mode select signal input Connecting to +3.3 V in this set.
I CPU interface chip select signal input
I CPU interface latch pulse signal input
I/O CPU interface data input/output
I CPU interface clock signal input
I CPU interface acknowledge signal input
— Power supply pin (+3.3 V)
O Data output
O Bit output
O LR clock output
I Data input 0
I Bit clock input A
I LR clock input A
I Data input 1
I Bit clock input B
I LR clock input B
— Power supply pin (+2.5 V)
I Standby mode control signal input
— Ground pin
— Ground pin for DAC Lch
— Reference voltage pin for DAC Lch
O DAC Lch output
— Power supply pin (+2.5 V) for DAC Lch
— Power supply pin (+2.5 V) for DAC Rch
O DAC Rch output
— Reference voltage pin for DAC Rch
— Ground pin for DAC Rch
I Test pin
I VCO select signal input
O Address output 0
O Address output 1
O Address output 2
O Address output 3
— Power supply pin (+3.3 V)
O Address output 4
O Address output 5
O Address output 6
O Address output 7
— Ground pin
I Flag input 0
I Flag input 1
I Flag input 2
I Flag input 3
I/O External interrupt signal input/output
I Data input 0
I Data input 1
— Ground pin
I Data input 2
I Data input 3
I Data input 4
Pin Description