Dell 2208WFP Service Manual page 14

then 5V voltage is supplied.
5V supply voltage feed back to PWM controller U850 via R861, R860,and I850,I851.R859,C859 and
C863 are used to control response time.
LD7575 implements an OVP function on Vcc .Whenever the Vcc voltage is higher than the OVP
threshold voltage, the output gate drive circuit will be shutdown simultaneously thus to stop the switching of
the power MOSFET until the next on.
2.3 I/F Board Circuit (see the Attachment 2- Schematic)
2.3.1 RGB CAPTURE
- Signal RED,GREEN,BLUE input through CN102 #1,#2,#3, Stop DC via C113, C114 and C115, and
then enter into U105 (RTD2545LH) analog input PIN #16,#14,#12, and then RTD2545LH deals
with signal internally. D103, D104, D105 are ESD protector to prevent U105 from ESD.
- Signal DDC_SCL (series clock) inputs via CN102#15, and then passes through ZD106 for ESD
protection, goes into EDID EEPROM IC U103 #6.
- Signal DDC_SDA (series data) inputs via CN102#12, and then passes through ZD103 for ESD
protection, goes into EDID EEPROM IC U103 #5.
- Signal TTL vertical sync. (Vsync) inputs via CN102 #14, and then clamped by ZD105 Zener, passes
through R134, and then goes into IC U105 (RTD2545LH) #8.
- Signal TTL horizontal sync. (Hsync) inputs via CN102 #13, and then clamped by ZD102 Zener,
passes through R133, and then goes into IC U105 (RTD2545LH) #9.
- CN102#5 is defined as cable detect pin, this detector realize via R125 and U108#24, and D102 is
ESD protector.
- U103 +5V is supplied by PC via CN102#9 with ZD102 for ESD protection, or supplied by Monitor
self via D106
- U103 is an EEPROM IC which is memory and EDID data saved in it.
2.3.2 DVI CAPTURE
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