Block Diagram Of Spu Board - Furuno FR-2155 Service Manual

Hide thumbs Also See for FR-2155:
Table of Contents

Advertisement

2.5 Block Diagram of SPU Board

P551
QV
C19
VIDEO
C14
R134
MAX : 5 V, MIN : 0 V
AC SEA VR
B23
MAX : 5 V, MIN : 0 V
GAIN VR
B25
MAX : 5 V, MIN : 0 V
A/C RAIN VR
C25
P552
A21
A22
TRACKBALL
A23
A24
0.7 V
(360 pulses,144Hz)
P551
BEARING
C13
8 V to 12 V
HEADING.P
A13
FROM RJ-7
C8
TO RJ-7
C7
P551
C11
GYRO DATA
GYRO CLOCK
C12
From INS
B5
B4
To INS
KEY DATA
B5
KEY CONT.
B4
P552
NAV DATA INTPUT
C17
NAV DATA OUTTPUT
A17
TP3
P551
Filter
TUNE IND
A17
R2/C1
4 Vpp
TP4(VIDEO)
Video
Selector
Video Amplifier
U43
A/D Converter
REF Voltage
Generator
U35
(Gate Array)
TB XA
#73
TB XB
#74
TB YA
#75
TB YB
#76
Timing Adjuster
& Divider
PLL
#14
#4
#98
U37
PLL
#14
#4
#103
U46
0 V
#97
CR7
40 MHz
#36
CR3
8192 pulses
#37
#47
U35
#48
#26
#97
U45
#25
CPU
CR8
#84
CR4
#83
CR5
#79
CR1
#80
CR6
4
12.5 MHz
#82
(50 MHz)
CR2
#83
U17
STBY : 0.7 V,
#6
#75
TX : About 3 V
#7
#5
U40
U72:VlEVEL 0
U73:VlEVEL 2
Trigger Gen.
U74:VlEVEL 4
Even Echo
U75:VlEVEL 6
Handling
Signal
U76:VlEVEL 8
U77:VlEVEL 10
Processing,
U78:VlEVEL 12
Echo
Even Level
Sampling
U72,73,
Trailing,
74,75,76,
I/F Rejection
Echo
77,78
Noise Rejection
Processing,
INT
Coordinate
TRIG
Conversion
U44
(r, )
03S9060
U79:VlEVEL 1
U81:VlEVEL 3
Trigger Gen.
U82:VlEVEL 5
Odd Echo
U83:VlEVEL 7
Handling
U85:VlEVEL 9
U86:VlEVEL 11
U88:VlEVEL 13
Odd Level
Sampling
U79,81,
I/F Rejection
82,83,85,
Noise Rejection
86,88
INT
TRIG
U45
Sampling Clock
03S9060
Y1
U15
Flash
RAM
EEPROM
Character
Generator
ROM(8M)
U11
U5,7
U10
U42
* Socket type
At board replacement
remove EEPROM and
put on to new board.
OSC
SPU Board (03P9253)
Figure 2.3 Block Diagram of SPU Board
From RP-26
(Video)
Echo Video
Priority
Memory
U24,26,28,
29,30
U33
(X,Y)
TP7 (H SYNC)
TP8 (V SYNC)
Echo
Processing
U27
Echo
Trailing
Memory
U25
32 MHz
OSC
Graphic
Memory
ACRTC
U16
Buffer
U1,3,4,6,
U18,19
8,9
Max. brilliance: 0.7 Vpp
µs
P552
Color Paletle
A30
D/A Converter
CRT VIDEO(R,G,B)
A31
To CRT
P/S Converter
A32
54.25 MHz
U34
OSC
* + cursor generation
4 V
P552
15.63us
C20
To CRT
4 V
16.63ms
A20
To CRT
TP6
P551
C16
From U35 #89
OPTION TRIGGER
TP5
From U35 #83
C17
TX TRIGGER
TP9
From U94 #1
A25
TUNING CONT.
TP1,2
To Dual
port RAM
in ARP/RP
FR2115-SME-23
2-8

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents