Diagrams; Ic Pin Description - Sony ICD-B25 Service Manual

ICD-B25

3-1. IC PIN DESCRIPTION

• IC712 MB90523APFF-G-122-BND (SYSTEM CONTROL)
Pin No. Pin Name
1 RTCCE
2 BEEP
3 XFLMRE
4 XFLMWE
5 FLMRB
6 DSPPWR
7 ADASYSCK
8 VCC
9 DSPSYSCK
10 XZRST
11 DSPACK
12 XDIFEN
13 DCOMDT
14 SIN1
15 SOT1
16 SCK1
17 to 32 SEG00 to 15
33 VSS
34 C
35 SIN2
36 SOT2
37 SCK2
38 DVCC
39 DVSS
40 ZIFACK
41 SIPCS
42 AVCC
43 AVRH
44 AVRL
45 AVSS
46 BATT
47 KEYIN0
48 KEYIN1
49 SPEED
50 XVORSW
51 HPJACK
52 FLMSEL
53 KEYPUP
54 VCC
55 FLMALE
56 FLMCLE
57 XVORIN
58 XDSPRST
59 to 62 COM0 to 3
63 VSS
64 to 72 SEG16 to 24
73 SUBXTAL
74 SUBCLK
6
SECTION 3

DIAGRAMS

I/O
O Real-time clock chip enable signal output
O Beep signal output
O Flash memory read enable signal output
O Flash memory write enable signal output
I Flash memory R/B signal input
O DSP power supply signal output
O ADA codec system clock signal output
— Power supply pin
O DSP system clock signal output
O Zephy reset signal output (Not used in this set.)
O DSP I/F acknowledge signal output
O DSP I/F enable signal output
O DSP I/F command/data signal output
I DSP I/F serial data signal input
O DSP I/F serial data signal output
O DSP I/F serial clock signal output
O LCD segment signal output
— Ground pin
— C (Connect to power supply pin.)
I Zephyr/RTC I/F serial data signal input
O Zephyr/RTC I/F serial data signal output
O Zephyr/RTC I/F serial clock signal output
— Digital power supply pin
— Digital ground pin
O Zephyr I/F acknowledge signal output (Not used in this set.)
O Serial parallel converter IC I/F chip enable signal output
— Analog power supply pin
— A/D reference voltage H (Connect to VCC.)
— A/D reference voltage L (Connect to ground.)
— Analog ground pin
I Battery level detection A/D signal input
I Key A/D signal input 0
I Key A/D signal input 1
I Speed switch A/D signal input
I VOR switch signal input (Low: VOR switch ON)
I Headphone jack ON/OFF signal input (Fixed at "L" in this set.)
I Flash memory select A/D signal input
O Key pull-up signal output
— Power supply pin
O Flash memory address latch enable signal output (AND: OE)
O Flash memory command enable signal output (AND: CDE)
I VOR signal input
O DSP reset signal output
O LCD common signal output
— Ground pin
O LCD segment signal output
O Sub clock oscillation pin (Not used in this set.)
I Sub clock oscillation signal input (32.768 kHz)
Pin Description