Sony STR-DB840 Service Manual page 53

• DIGITAL BOARD IC1401 CXD2712R (AUDIO DSP)
Pin No. Pin Name
VSS3
1
2 to 5 SOA to SOD
6, 7 ECJ0, ECJ1
8 NC
9 XHDWR
10 XHDRD
11 VSS4
12 VDD2
13 HRDY
14 XHDCS
HA0
15
16 to 20 HD0 to HD4
VSS5
21
VDD3
22
23 to 25 HD5 to HD7
XRST
26
27 to 30 FGP0 toFGP3
VSS6
31
ED0 to ED8
32 to 40
VSS7
41
42 VDD4
43 to 49 ED9 to ED15
TEST
50
VSS8
51
VDD5
52
ED16 to ED23
53 to 60
VSS9
61
ED24 to ED31
62 to 69
70 XOE
VSS10
71
VDD6
72
73 CAS
XWE
74
RAS
75
EA0 to EA4
76 to 80
VSS11
81
VDD7
82
E5 to EA11
83 to 89
EA12
90
91 VSS0
EA13 to EA15
92 to 94
EA16
95
TSTA
96
PLDIVF
97
PLDIVB
98
I/O
—
Ground terminal
O
Serial data output to the A/D, D/A converter
I
Conditional jump input terminal (fixed at "L" in this set)
O
Not used (fixed at "L")
I Write data input from the system controller (IC1201)
I
Read data input terminal Not used (fixed at "H")
—
Ground terminal
—
Power supply terminal (+3.3V)
O
Ready signal output to the system controller (IC1201)
I
Chip select signal input from the system controller (IC1201)
I
Address signal input from the system controller (IC1201)
I/O Two-way data bus with the system controller (IC1201)
—
Ground terminal
—
Power supply terminal (+3.3V)
I/O Two-way data bus with the system controller (IC1201)
I
Reset signal input from the system controller (IC1201) "L": reset
I/O
Data output terminal for the test
—
Ground terminal
I/O
Two-way data bus with external RAM Not used (fixed at "L")
—
Ground terminal
—
Power supply terminal (+3.3V)
I/O Two-way data bus with external RAM Not used (fixed at "L")
I
Test terminal (Normally: fixed at "L")
—
Ground terminal
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the S-RAM (IC1402)
—
Ground terminal
I/O
Two-way data bus with the S-RAM (IC1402)
O Output enable signal output to the S-RAM (IC1402)
—
Ground terminal
—
Power supply terminal (+3.3V)
O External RAM column address strobe signal output terminal Not used
O
Write enable signal output to the S-RAM (IC1402)
O
External RAM raw address strobe signal output terminal Not used
O
Address signal output to the S-RAM (IC1402) or test data input from the S-RAM (IC1402)
—
Ground terminal
—
Power supply terminal (+3.3V)
O
Address signal output to the S-RAM (IC1402) or test data input from the S-RAM (IC1402)
O
Address signal output to the S-RAM (IC1402)
— Ground terminal
O
Address signal output to the S-RAM (IC1402)
O
Address signal output terminal (for check)
I
Test data input terminal (Normally: fixed at "L")
I
PLL input frequency select terminal
O
PLL input frequency select terminal
Description
"L": 256fs "H": 128fs (fixed at "L" in this set)
"L": 768fs "H": 1024fs (fixed at "H" in this set)
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