ViewSonic VP950b Service Manual page 20

SST25LF020A/040A devices significantly improve performance, while lowering
power consumption. The total energy consumed is a function of the applied volt-
age, current, and time of application. The SST25LF020A/040A devices operate
with a single 3.0-3.6V power supply. The SST25LF020A devices are offered in
an 8-lead SOIC 150 mil body width (SA) package.
Pin Diagram:
PIN Descriptions:
Symbol Pin Name
SCK Serial Clock
Serial Data
SI
Input
Serial Data
SO
Output
CE# Chip Enable
WP# Write Protect
HOLD# Hold
Power
V
DD
Supply
V Ground
SS
ViewSonic Corporation
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising
edge of the clock input, while output data is shifted out on the
falling edge of the clock input.
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
The device is enabled by a high to low transition on CE#. CE#
must remain low for the duration of any command sequence.
The Write Protect (WP#) pin is used to enable/disable BPL bit in
the status register.
To temporarily stop serial communication with SPI flash memory
without resetting the device.
To provide power supply(3.0-3.6V)
- 20 –
Confidential - Do Not Cop
Functions
VP950b