Voltage Block Diagram - Icom IC-80AD Service Manual

4-4 CPU PORT ALLOCATION (continued)
PIN
LINE
NAME
No.
Reset signal from the reset IC (LOGIC UNIT: IC100).
77 RESET
79 UNLK Unlock signal from the PLL IC (MAIN UNIT: IC800).
85 RX232 RS-232 data (RXD).
86 TX232 RS-232 data (TXD).
Clock frequency shift signal to the clock oscillator (LOGIC UNIT: X1,
89 CLSFT
D13).
90 PPS Power save mode control signal to theD PLL IC (MAIN UNIT: IC800).
Charging control signal to the charge circuit (LOGIC UNIT: Q150–153,
91 CHGC
D150, 151)
Charging current control signal to the charging controller (LOGIC UNIT:
92 CHGH
Q150, 152).
The voltage in proportion to the internal temperature.
97 TEMP The voltage divided by R66 (thermistor; LOGIC UNIT) and R67 (LOGIC
UNIT).
98 RTONE Weather alert signals.
DC voltage divided by the voltage detect resisters (LOGIC UNIT: R159
96 VIN
and R160). (Remaining battery capacity detection.)
99 CTONE CTCSS signals.
100 RSSI RSSI voltage from the IF IC (MAIN UNIT: IC100).
• While operated by batteryRSSI voltage from the IF IC (MAIN UNIT:
IC100).
101 TX-V
• While perated by external power supplyCurrent in TX from the I-V
converter (MAIN UNIT: IC800).
The voltage in proportion to the TX power AMP (RF UNIT: Q100)
102 TTEMP temperature.The voltage divided by R161 (thermistor; RF UNIT) and
R162 (RF UNIT).
103 CTCOUT CTCSS/DTCS signals.
104 DTMF Tone (DTMF, european tone: IC-E80D only) signals.
External power supply detection.
109 CPUHV
110 POWER [POWER] key input. (Pull-up)
111 D_AS Analog/Digital mode switching signal.
113 ECK Clock to the EEPROM (LOGIC UNIT: IC51).
Serial data to the EEPROM (LOGIC UNIT: IC51).
114 ESIO
116 CLIN Key detect signal. (Pushed button is detected by refering input voltage.)
118 CLOUT Cloning data.

4-5 VOLTAGE BLOCK DIAGRAM

Voltage from the power supply is routed to the whole of the transceiver via regulators and switches.
Q1000,
D1000, 1001
DC-IN
DC
Battery pack
SW
B A T T
CHG
Q150−153
D150, 151
CHGH CHGC
DESCRIPTION
IC102
VCC +5V
SW
REG
Q803−805
T5
T5
TXC
Q400−402
AF AMP
AF PWR AMP
REG
(IC400)
AFON
BCVCOC
+5V
3.2V
REG
REG
AMBEC
DVC
3.3V
REG
+5V
SW
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IC100
+3CPU
REG
IC103
+ 3 V
+3V
REG
P C O N
IC125
+ 5 5 . V
DC-DC
Q800, 801
VCO3V
VCO UNIT
SW
UVCOC
VVCOC
3.2V
+3V
5V
4 - 7
IN/
STATUS CONDITION
IN H –
IN H PLL is locked.
IN – –
– –
H –
L In power save mode.
H While charging.
H Charging current increase.
IN – –
IN – –
IN – –
IN – –
IN – –
IN – –
IN – –
– –
– –
E x t e r n a l p ow e r s u p p l y i s
IN L
connected.
IN L The key is pushed.
IN H Analog mode.
– –
IN/
– –
IN – –
– –