Sony HCD-GTX777 Service Manual page 74

Cd deck receiver
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HCD-GTX777/GTX787/GTX888
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• IC Pin Function Descriptions
IC401 R5F3640MDFAR (System Controller) Main board
Pin No.
Pin Name
1
REQ
2
RST
3
M-MUTE
4
SIRCS
5
CCE
6
CD CLK (BUCK)
7
USB SEL-SW
8
BYTE
9
CNVss
10
XC-IN
11
XC-OUT
12
RESET
13
X-OUT
14
VSS
15
X-IN
16
VCC
17
NMI
18
CAPM+
19
SBSY
20
AC-CUT
21
TMR
22
E-1
23
E-3
TE
L 13942296513
24
OPEN-SW
25
TBL-SENSE
26
CIG BK
27
E-2
28
CIG LATCH
29
IIC-CLK
30
IIC-DATA
31
CIG DATA
32
TMF
33
CIG CLK
34
USB SERIAL CTS0
35
USB SERIAL TxD0
36
USB SERIAL RxD0
37
USB-RST
38
USB SERIAL RTS0
39
B-TRIG
40
EFFECTOR-CTRL 1
41
EFFECTOR-CTRL 3
42
LED DRIVER-LATCH
43
LED DRIVER-DATA
44
LED DRIVER-CLOCK
45
PROTECT2
46
STBY LED
47
B SHUT
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48
STBY RELAY
49
STK-MUTE
50
FAN CONTROL
.
51
LINE-MUTE
52
FRONT-RELAY
53
LINK RELAY
74
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I/O
I
Zipang decoder request pin to master control.
O
Reset signal output to the Zipang IC (digital signal processor) "L":reset
O
Control port for Zipang motor driver mute.
I
Remote control signal input
O
Chip enable contor port to Zipang IC.
O
Serial data transfer clock signal to Zipang IC
O
USB and ZIPANG (CD) control switch CD(H) / USB(L)
Ground terminal
Ground terminal
I
Sub system clock input terminal (32.768kHz)
O
Sub system clock output terminal (32.768kHz)
System reset signal input from the reset signal IC "L": reset
I
After the power supply rises, "L" is input for several hundreds msec and then change to "H".
O
Main system clock output terminal (5MHz)
Ground terminal
Main system clock input terminal (5MHz)
Power supply terminal (+3.3V)
I
Non-maskable interrupt input terminal
O
Capstan motor drive signal output
I
Subcode sync detection signal input from the digital signal processor (Zipang IC).
I
AC off detection signal input from the reset signal IC "L": AC Cut detected
O
CDM turning motor control signal output
I
Disc tray status detection signal input from CDM
I
Disc tray status detection signal input from CDM
I
Eject detection signal input from CDM
I
Disc tray position detection signal input from CDM
O
Backlight control signal for CIG (Chip In Glass) of fl uorescent indicator tube.
I
Disc tray status detection signal input from CDM
O
Latch control signal for CIG (Chip In Glass) of fl uorescent indicator tube.
I/O
Clock signal for IIC communcation for Master Control controller.
I/O
Data signal for IIC communcation for Master Control controller.
O
Data signal for CIG (Chip In Glass) of FL Display.
O
CDM turning motor control signal output
O
Clock signal for CIG (Chip In Glass) of FL Display.
I
Serial send control input pin from USB IC
O
UART serial transmission data line to USB IC.
I
UART serial reception data line from USB IC.
O
Reset signal output to USB control IC "L": reset
O
Serial receive control output pin from USB IC.
O
Deck side trigger plunger drive signal output "H":plunger on
O
Effector circuitry mode control 1, "H": Delay/Effector Off , "H": Flanger/Chorus.
O
Effector circuitry mode control 3,"H": Chorus/ Effector Off, "L": Flanger/ Delay.
O
Latch control signal for LED Driver IC.
O
Data signal for LED Driver IC.
O
Clock signal for LED Driver IC.
O
FAN current detect and Regulator Short detect, ON(H)/ OFF(L)
O
LED drive signal output of POWER indicator.
I
Shut off detection signal input from deck A side reel pulse detector (A/D input)
O
Main power on/off control signal output "H":power on
O
Power amplifi er and sub woofer amplifi er on/off control signal output "H": amplifi er on
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O
Fan on/off control port.
i
O
Line muting on/off control signal "L":muting on
O
Relay drive signal output for the front speakers "H":relay on
O
Surround speaker mode control signal "H":LINK "L":MATRIX SURROUND1/2
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2 9
8
Pin Description
Q Q
3
6 7
1 3
1 5
co
.
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9

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