Block Diagram - I. Link Section - Sony TA-DA9000ES Service Manual

TA-DA9000ES
6-4. BLOCK DIAGRAM – I. LINK Section –
J3002
i. LINK S200
AUDIO IN
4
TAIP
3
TAIN
2
TBIP
1
TBIN
BIAS
11
958OUT
(Page 25)
I512
9
LEVEL SHIFT
22.5792
(Page 24) IC3013
DATA
BCK
21
LRCK
MILES AUDIO
(Page 27)
MILES RESET
19
I512 OFF
(Page 25)
15
DI1O DSD-L
16
DI2O DSD-R
14 TRA1P
DI5O 19 DSD-SL
143 TRA1N
DI6O 20 DSD-SR
142 TRB1P
DI3O 17 DSD-C
141 TRB1N
18
DI4O DSD-W
145 VALIB OUT 3
64FS
ERR_OUT 174
SYTOUT 24
129
XO
SD-RAM
X3001
IC3008
24.576MHz
XI
130
I. LINK INTERFACE
IC3003
164 DOUT
27 FSS12 OUT
167 FSS12
XRAS
78 18 XRAS
XCAS
79 34 UCAS
35 LCAS
XWE 81 17 XWE
XOE 80 33 XOE
171 SACKO
172 LRCKO
XRD 52
XWR 51
XCS
50
XRDY 53
PWD 119
XRESETO
122
XRESETL 165
REFOUT
23
PLLCKI 25
22
(Page 28)
35 ERR CLR
D0 – D15 D0 – D15
A1 – A8
A1 – A13
EEPROM
IC3001
D0 – D7
A1 – A13
CE 20 48 EEP_CS
OE 22 44 RD
WE 27 46 WR
18 MIES AUDIO
49 CXD3270_XCS
39 RDY
89
PHY_BIAS
90 PHY_RST
92 LINK_RST
VCO
IC3005
4 FINA
5 FINB
3 VCOO VCOX 10
26 26
DIVIDER
IC3009
IC3007 (2/2)
12
QC
10
ENT • SIGNAL PATH
LOAD 9
1 CLR
2 CK ENP 7
DIVIDER
IC3006
C0 15
9
SWITCHING LOAD
1 CLR
IC3007 (1/2) ERROR-3210
2 CK ENP 7
UN-MUTE 10
HCNTL0 51 39 HCNTL0
HCNTL1 52 46 HCNTL1
I. LINK DSP
IC3012
AKE_XF 19 27 XF
HRDY 21 55 HRDY
XHAS 22 13 HAS
XHDS1 23 127 HDS1
XHDS2 24 129 HDS2
XHCS 25 17 HCS
I. LINK SYSTEM
XRS 26 98 RS
CONTROLLER
IC3002 HRW 54 18 HR/W
HBIL 53 62 HBIL
IIC DATA 30
IIC CLK 29
RESET SWITCH
RESET 12
IC3011
XOUT 13
X3002
10MHz
XIN 15
: AUDIO (DIGITAL)
ERROR-3210 15
(Page 25)
X1 96
X3003
20MHz
X2/CLKIN 97
I2C-DATA
23
I2C-CLK
(Page 33)