Toshiba 13A21 Service Manual page 32

4.1.4 Video Decoder
The FLI8532 chip has a sophisticated Analog Front End with 16 reconfigurable inputs
through an analog multiplexer to anti-alias filters before the Analog to Digital Converters
(ADCs). These integrated features eliminate the need for any devices between the input
connector and the pin of the FLI8532.
The figure above depicts the data-path for the AFE and Decoder blocks with connections to
the input multiplexer that selects whether the data follows the Main Video Channel or PIP video
channel.
The analog front end of FLI8532 provides the capability to capture 16 analog video inputs
which can be a combination of Composite (CVBS), S-Video (SY, SC), YPrPb (Y, Pr, Pb) or
RGB (R, G, B).
The FLI8532 front end provides filtering capability depending on the type of input video
signal in use. The use of these filters eliminates the need to have any external filter components.
The filters included are both in the analog as well as digital domain. The digital filter eases the
design requirement of the analog anti-aliasing filter.
The analog filter is implemented with the following 3dB cutoff definition.
10 MHz – for SDTV
20 MHz – for 480p/576p
40 MHz – for 720p/1080i
180 MHz – for Graphics
The digital filters are implemented as Quarter Band (QB), for SDTV and 480p/576p and as Half
Band (HB), for 720p/1080i modes.
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