Block Diagrams; Dsp Section - Sony STR-DB925 Service Manual

3-2. BLOCK DIAGRAMS

– DSP SECTION –
119 SIC
AUDATA2
AUDATA1 118 SIB
AUDATA0 117 SIA
BCK
113 BCKO
LRCK 115 LRCKO
99 CLK1
SCLK
E
DOLBY
SECTION
SCCLK
(Page 14)
SRDT
ERROR
XTALERR
ANA/DIGI
SCDIN
CS
RESET
SCDOUT
INTREQ
09
SOA 2
SOB 3
SOC 4
5
SOD
HD0
16
I
DIGITAL SIGNAL
20
PROCESSOR
IC1401
23
I
25
HD7
HAO 15
XRST 26
XHDCS 14
13
HRDY
XHDWR 9
XHDRD 10
ED16 ED31 EA0 EA15 XWE XCE
. . .
53-60 62-69
76-80 83-90 92-94 74 70
. . .
. . .
7-10 13-16 29-32 35-38 5-1 44-42 27-24 21-18 17 41
D0 D15 A0 A15 WE CE
STATIC RAM
IC1402
F MUTE
BUFFER
CONTROL
Q1203
Q1201,1202
SWITCH
Q1208
– 7 –
BUFFER
37 SOD SCLK 78
Q1207
XLAT 77
76
SWDT
HD0
25
RESET
I
DIG-IN2 109
32
HD7
DIG-IN1
110
DIG-IN0 111
35 HAO
36 XRST PD
24 XHDCS CDTO
CDTI
BUFFER CCLK
23 HRDY
Q1206
CS
EVSTB 48
INVERTER
EVDATA 49
IC1202
EVCLK 50
10 3 21 XHDWR
ACMUTE 84
12 1 22 XHDRD
8 5 16 SCLK
SYSTEM CONTROL
DISPDATA 52
IC1201(2/2)
DISPCLK 55
51
DISPMR
75 SRDT
SLVDATA/REQ 53
40 ERROR
RESET 90
RY-FRONT/A 101
RY-FRONT/B 102
RY-CENTER 103
RY-REAR 104
85 FUNMUTE
WOOFER-RY 105
RY-HP 106
13 XTALERR
RY-POWER 107
14 ANALOG/DIGI
15 SCDIN
PROTEC 79
17 CS
STOP 64
20 RESET
18 SCDIO/OUT
BUFFER
SINO
Q1204,1205 19 INTREQ
SOTO 10
MDO 89
93 XI
MD2 87
X1201
4MHz
92 XO
2
C
B
A
7
6
5
4
3
9
• Signal path
: FM
: CD
: DIGITAL IN
– 8 –
STR-DB925
SDTI1
SDTI2
SDTI3
SCLK
XLAT
SWDT
D
RESET
C
B
DOLBY
A
SECTION
(Page 13)
PD
CDTO
CDTI
CCLK
CS
VOL CE
VOL DATA
VOL CLK
AMUTE
UDATA
UCLOCK
UMREQ
USREQ
URESET
F
SP/A RY
SP/B RY
C RY
POWER
SUR RY
SECTION
W RY
(Page 11)
HP RY
P RY
PROTECT
STOP
SINO
SOTO
MDO
MD2
G
FMUTE
INPUT
SECTION
(Page 10)