Dell S1909WNf Service Manual page 12

Lcd monitor
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- U103 +3.3V is supplied by PC via CN102#9 with D106 and ZD102 for ESD protection, or
supplied by Monitor self via D106.
- U103 is an EEPROM IC which is memory and EDID data saved in it.
2.3.2 DVI CAPTURE(NA)
- Differential Signal input RX0+,RX0-,RX1+,RX1-,RX2+,RX2-,RXC+,RXC- through CN102
#18,#17,#10,#9,#2,#1,#23,#24 via R130,R131,R132,R133,R134,R135,R137,R138 enter
into U104 (TSUM1PEJ-LF-2) Digital input terminal #39,#40,#42,#43,#45,#46,#48,#49, and
then TSUM56BWHK-LF deals with signal internally. D108, D109, D110, D111, D112, D113,
D114, D115 are ESD protector to prevent U104 from ESD
- Signal DDC_SCL (series clock) inputs via CN102#6, and then passes through ZD106 Zener
for ESD protection, via R126, goes into EDID EEPROM IC U101 #6.
- Signal DDC_SDA (series data) inputs via CN102#7, and then passes through ZD107 Zener
for ESD protection, via R127, goes into EDID EEPROM IC U101 #5.
- CN102#15 is defined as cable detect pin, this detector realize passes through R125 ,go into
U104#27, and ZD110 is ESD protector.
- U101 +5V is supplied by PC via CN102#14 through D107, or supplied by Monitor self via
D107.
- U101 is an EEPROM IC which is memory and DVI input EDID data saved in it.
2.3.3 Buttons Control
- Button "Power" on front bezel connects to U105 (TSUM1PEJ-LF-2) #4 through CN104 #1,
U105 #4 is defined as power on/off.
- Button " " on front bezel connects to U105(TSUM1PEJ-LF-2) #24 through CN104 #2,
U105#120 Voltage is defined as "Plus".
- Button " " on front bezel connects to U104 (TSUM1PEJ-LF-2) #24 through CN104 #2, U105
#120 Voltage is defined as "Minus".
- Button "Menu" on front bezel connects to U105 (TSUM1PEJ-LF-2) #121 through CN104 #4,
U105 #121 Voltage is defined as "Menu".
- Button "ENTER" on front bezel connects to U105 (TSUM1PEJ-LF-2) #121 through CN104
#4, U104 #121 Voltage is defined as "ENTER".
- LED Indicator on Front Bezel
a. When press button "power", U105 (TSUM1PEJ-LF-2) #123 be send in low Voltage, make
Q107#3 sends out low Voltage , and then to CN01#2 on keypad, LED white on.
b. When in "Suspend" mode, U105 (TSUM1PEJ-LF-2) #124 sends out a low Voltage, make
Q108#3 sends out low Voltage and then to CN01 #3 on keypad, LED Amber ON.
2.3.4 MATAR CHIP U105 (TSUM1PEJ-LF-2)
- U105 (TSUM1PEJ-LF-2 ) #86~#77 output 8 bit even and #100~#91 output 8 bit odd LVDS
digital data to panel control circuit through CN103.
- U105 (TSUM1PEJ-LF-2) #73 output PPWR "H" potential to make Q104 conducted, and then
make Q101 conducted, +5V flow to CN103#1~#3 as Panel Vdd .
- U105 (TSUM1PEJ-LF-2) #109 output CCFL_ON/OFF "L" potential to control Inverter on/off.
- U105 (TSUM1PEJ-LF-2) #125 outputs Brightness "PWM" signals to control CCFL
brightness.
- TCLK by Crystal 14.318MHz input to U105 (TSUM1PEJ-LF-2) #128.
- U105 (TSUM1PEJ-LF-2) #7is RESET signals input pin
Please refer to TSUM1PEJ-LF-2 Pin Assignments table in page
2.3.5 Regulator Circuit
- +5V is from switching mode power supply for panel
- +3.3V is generated from Regulator U101 which is supplied by+5V through C104 filtering,
C102 is 3.3V output filter ,the output 3.3V supplies to U102, U103,U105,U108.
- +1.8V is generated from Regulator U102 which is supplied byU101-3.3V through C106
filtering.The1.8V via FB105 supplies to U105.
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