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HCD-EX100
5-15. IC PIN FUNCTIONS
• IC303 DIGITAL SERVO & DIGITAL SIGNAL PROCESSOR (CXD2585Q) (MAIN Board (1/3))
Pin No.
Pin Name
I/O
I
1
DVDD
Power supply
I
2
XRST
System reset input "L" : reset
I
3
MUTE
Muting input "H" : mute
I
4
DATA
Serial data input, supplied from CPU
5
XLAT
I
Latch input, supplied from CPU
6
CLOK
I
Serial data transfer clock input, supplied from CPU
7
SENS
O
SENS signal output to CPU
8
SCLK
I
SENS serial data read-out clock input
9
ATSK
I
Input pin for anti-shock (Connected to ground)
10
WFCK
O
Not used
11
XUGF
O
XPGF signal output (For check pin)
12
XPCK
O
XPCK signal output (For check pin)
GFS
O
GFS signal output (For check pin)
13
C2PO
O
C2PO signal output (For check pin)
14
SCOR
O
Sub-code sync output
15
CM4
O
4.2336 MHz output (Not used)
16
WDCK
O
Word clock output (ƒ = 2Fs) (Not used)
17
DVSS
–
Digital ground
18
COUT
I/O
Numbers of track counted signal input/output (Not used)
19
MIRR
I/O
Mirror signal input/output (Not used)
20
DFCT
I/O
Defect signal input/output (Not used)
21
FOK
I/O
Focus OK input/output (Not used)
22
PWMI
I
Spindle motor external control input (Connected to ground)
23
I/O
24
LOCK
GFS is sampled by 460 Hz. H when GFS is H (Not used)
O
25
MDP
Output to control spindle motor servo
26
SSTP
I
Input signal to detect disc inner most track
27
FSTO
O
2/3 divider output (Not used)
28
DVDD1
I
Power supply
29
SFDR
O
Sled drive output
30
SRDR
O
Sled drive output
31
TFDR
O
Tracking drive output
32
TRDR
O
Tracking drive output
33
FFDR
O
Focus drive output
FRDR
O
Focus drive output
34
DVSS1
–
Digital ground
35
TEST
I
TEST pin connected normally to ground
36
TES1
I
TEST pin connected normally to ground
37
VC
I
Center voltage input
38
FE
I
Focus error signal input
39
SE
I
Sled error signal input
40
• Abbreviation
GFS : Guarded Frame Sync
Function
30
Pin No.
Pin Name
I/O
41
TE
I
Tracking error signal input
42
CE
I
Center servo analog input (Connected to ground)
43
RFDC
I
RF signal input
44
ADIO
O
Not used
45
AVSS0
–
Analog ground
46
IGEN
I
Stabilized current input for operational amplifiers
47
I
Power supply
AVDD0
48
O
EFM full swing output
ASYO
49
I
Asymmetry comparate voltage input
ASYI
50
I
EFM signal input
RFAC
51
–
Analog ground
AVSS1
52
I
Control voltage input for master VCO1
CLTV
O
Filter output for master PLL
53
FILO
I
Filter input for master PLL
54
FILI
O
Charge-pump output for master PLL
55
PCO
I
Power supply
56
AVDD1
57
BIAS
I
Asymmetry circuit constant current input
58
VCTL
I
VCO2 control voltage input (Connected to VDD)
59
V16M
I/O
Not used
60
VPCO
O
Not used
61
DVDD2
I
Power supply
62
ASYE
I
Asymmetry circuit ON/OFF input "L" OFF, "H" : ON (Connected to VDD)
63
MD2
I
Digital-out ON/OFF control input (Connected to VDD)
64
DOUT
O
Digital-out output pin
65
LRCK
O
D/A interface LR clock output (ƒ = Fs)
66
PCMD
O
D/A interface serial data output
67
BCLK
O
D/A interface bit clock output
68
O
Playback disc output in emphasis mode (Not used)
EMPH
69
I
X'tal selection input (Connected to ground)
XTSL
70
–
Digital ground
DVSS2
71
I
X'tal oscillator circuit input
XTAI
72
O
X'tal oscillator circuit output (Not used)
XTAO
73
O
Serial data output in servo block (Not used)
SOUT
74
O
Serial data read clock output in servo block (Not used)
SOCK
O
Serial data latch output in servo block (Not used)
75
XOLT
O
Sub-Q 80-bit and PCM peak level data output (CD text data output)
76
SQSO
I
Clock input for SQSO read-out
77
SQCK
78
SCSY
I
Connected to ground
79
SBSO
O
Sub-P through Sub-W serial output (Not used)
80
EXCK
I
Clock input for SBSO read-out (Connected to ground)
• Abbreviation
EFM : Eight to Fourteen Modulation
PLL : Phase Locked Loop
30
Function
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