Icom IC-A23 Service Manual page 9

4-1-8 ANL CIRCUIT (RF UNIT)
The ANL (Automatic Noise Limiter) circuit (Q21, D18)
reduces pulse noises.
The AM detector output signal from the Q18 is applied to the
cathode of D18 passing through R99 where it is divided by
R99 and R100. The signal is also applied to the anode of
D18, passing through R101 and R102.
When the ANL function is activated (Q21 is ON), C115 is
grounded. The detector output, including pulse noise, is
applied to the cathode of D18 only. If pulse noises are
received, the cathode voltage of D18 becomes higher than
the anode voltage and D18 turns OFF. Thus, while pulse
noises are received, the detected signal is not applied to
IC2.
• ANL CIRCUIT
To IC2, pin 6
R102
Q21
C115
"ANLC" signal
from IC5, pin 12
4-1-9 VOR NAVIGATION CIRCUIT (LOGIC UNIT)
(IC-A23 ONLY)
From the AF signal, the VOR circuit detects a variable signal
(VORC) and reference signal (VORS) from a VOR station.
The VOR circuit sends these signals to the CPU (IC1).
When the transceiver is set in the navigation band
(108.000–117.975 MHz), the VORON port of shift resistor
(IC8, pin 4) becomes "HIGH" turning the VOR circuit ON via
Q15. Q15 controls a 5 V power source for the VOR circuit.
The signal from the AM detector (VORDET) is buffer ampli-
fied at the OP-AMP IC (IC12).
The "VORDET" signal includes 30 Hz variable phase com-
ponents and 9960 Hz reference phase components.
• VOR NAVIGATION CIRCUIT
IC14
1
Comp.
"VORC" signal to the
CPU (IC1, pin 22)
7
Comp.
"VORS" signal to the
CPU (IC1, pin 11)
Amp.
"VORD" signal to the
CPU (IC1, pin 2)
D18 R99
AM AF signal
from Q18
R100
R101
3
2
IC13
5
6 7
Phase
LPF
shift
The 30 Hz component passes through the 30 Hz bandpass
filter (IC12, R83, R85–R88, C112, C113), and is converted
to a square-wave signal at the VORC comparator (IC14).
The square-wave signal is then applied to the CPU (IC1, pin
22) as variable signal (VORC).
The 9960 Hz component passes through the 10 kHz band-
pass filter (IC12, R79–R81, C108, C109). These compo-
nents are FM modulated with 480 Hz deviation and 30 Hz
modulation.
Signals are then amplified at a limiter amplifier (IC11), and
detected at an FM detector (IC11) to obtain a 30 Hz refer-
ence signal.
The 30 Hz signal is compensated on phase at IC12. This
signal is passed through the 30 Hz bandpass filter (IC12)
and is converted to a square-wave signal at the VORS com-
parator (IC14). This signal is applied to the CPU (IC1, pin 11)
as a reference signal (VORS).
A portion of output from the buffer amplifier (IC12) is applied
to the amplifier (Q13). When VOR level is low or receiving
the signal except VOR signal, output from Q13 is reduced.
Q13 cannot be turned ON, then IC1 (pin 2) receives "HIGH"
to indicate "OFF FLAG" indicator.
"VOR" signal from VOR
controller (Q15, pin 3)
IC11
3 7 2
FM
Limit.
DET
IC1
FI2
4 - 3
"VORDET" signal from
the AM detector (Q18)
3 5
1
BIAS
30 Hz
14
BPF
Buff.
10 kHz
8
BPF
IC12