Block Diagram - Cdg Section - Sony HCD-GNX88 Service Manual

7-2. BLOCK DIAGRAM – CDG SECTION –
OPTICAL PICK-UP
BLOCK
(KSM-215DCP/C2NP)
DETECTOR
VCC +3.3V
VC
A
B
C
D
E
F
Q10
LD
LD
DRIVER
GND
PD
VR
IC251
SL/SP MOTOR
DRIVER
F+ OUT
12 CH2OUT-F
VREF
FOCUS
CH1FIN
COIL
F
11 CH2OUT-R
CH1RIN
T+
13 CH1OUT-R
TRACKING
CH2FIN
COIL
T
14 CH1OUT-F
CH2RIN
15 CH4OUT-R
M101
M CH3FIN
(SPINDLE)
16 CH4OUT-F
CH3RIN
17 CH3OUT-F
M102
M
OPIN+
(SLED)
CH3OUT-R
18
MUTE
S101
(LIMIT)
HCD-GNX88
81
AOUT1
AOUT2 86
IC101 CD MUTE
RF AMP Q250,251
DOUT 71
25 VC
26 A PCMD1 61
27 B LRCKI 62
28 C LRCK 63
29
D PCMD 65
19 E
BCK 66
20 F BCK1 60
36 LD
77 XTAO
X171
16.9MHz
78 XTAI
XTCN
XTACN 95
XRST
37 PD XRST 100
DATA
DATA 102
XLT
XLAT 104
CLOCK
CLOCK 105
SENS
SENS 107
26
SCOR
SCOR 115
4 11 TFDR
NC
GFS 113
5 12 TRDR
C2PO 114 NC
6 13 FFDR
7 14 FRDR
23 9 SFDR
22 10 SRDR IC1005
5 6 9 8
2 6 MPD
1 2 3 4
WFCK
110
20 100
XRST
13 12 11 10
98
SBSO
EXCK
99
SSTP
7
IC1002
DRAM
DQ1-4
A0-7
RAS 4
CAS 23
WE 3
CE 22
R-CH
CD MUTE DRIVE
Q540, 541
IC301
DIGITAL SIGNAL
PROCESSOR
IC303
11 SDO0 +3.3V
VDD 55 5 REG 1
16 LRCKIA
VDD 21
19 SFSY/LRCK1B 40
VDDM
14 SDI0
15 BCKIA
18 SBSY/BCK1B
MP3 STB
27 MP3 STB
STANBY 3
MP3 REQ
PO11/BUCK/AD1 36 26 MP3 REQ
MP3 ACK
MIACK 8 25 MP3 ACK
MP3 CLK
7
MICK 7
MP3 CLK
MP3 DATA
MIDIO 6
5 MP3 DATA OUT
MP3 LP
MILP 5
24 MP3 LP
MP3 CS
MICS 4 23
MP3 CS
MP3 RST
RESET 2 22 MP3 RST
SRMSTB 41 6 MP3 DATA IN
SCOR
19 SCOR
SENS
21
SENS
CLOCK
18 CD-CLK
XLT
3 XLAT
DATA
2 CD-DATA
XRST
1 XRST
XTCN
XTCN
28
CD MUTE
37
IC1001
VIDEO D/A
Q1005,1009
MUTE DATA
4 SBSY
6
MUTE
Q1004
HALT_CLK
5 SFSY 56
PDOWN
Q1003
PAL/_NTSC
3 DATA 55
SENTSC
Q1002,1006
CDG-RST
CLCK RESET 54 CDG-POWER
2
Q1001
CDG/_BDG
DEN 52
CDG-DET VMUTE
GDET 37
VDOUT 44
VD0-3
VA0-7
14 RAS
26 CAS
13 WE
28 CE
60 59 58 57
X1002 X1001
14.31818MHz 17.734475MHz
27 27
MAIN
A
CD-L
SECTION
(Page 29)
IC210
CD DIGITAL
OPTICAL
OUT
3
OUT
OPTICAL
LMR
46
LMF 45
TM-R 44
TM-F 43
TBL_SENS 39
E-1 42
E-2 41
E-3 40
OPEN SW 38
IC401 (1/5)
SYSTEM
CONTROL
35 34 33 31 32 9
IC1003
+5V REG.
+B SWITCH
VCC 1 VIN 3
VOUT
Q1007,1008
IC1006
VIDEO BUFFER
Q1010
1 PWR VCC 6
SAVE 2
J1001
4 VIN VOUT 3 VIDEO
OUT
HCD-GNX88
IC701
(LD)MOTOR DRIVER
9 RIN OUT1 4
7 FIN OUT2 2 M M751(LOADING)
IC712
M
M741(TBL)
TBL MOTOR DRIVER
RIN OUT1
9 4
7 FIN OUT2 2 D+3.3V
IC731
Q731
(TABLE SENSOR)
INVERTER
RE701
E-3
ROTARY
E-2
ENCODER
E-1
S751
(LEVER SW)
RESET
DISPLAY
IIC-DATA
B
SECTION
IIC-CLK
(Page 31)
NO402
3
IIC-CLK
4
IIC-DATA
CN402
VMUTE
2
TXD1
CDG/_BGC
3
RTS1
ON BOARD
CDG/-DET
6
CLK1 PROGRAM
CDG/-POWER
7
RXD1
CNVSS 8
CN VSS
9
RESET
• R-CH is omitted due to same as L-CH.
• SIGNAL PATH
: CD
: CDG
: VIDEO