Sony HCD-GR3 Service Manual page 29

6-14. IC BLOCK DIAGRAMS
IC101 CXA1782BQ
36 35 34 33 32
+
+
+
+
LEVELS
APC
+
–
RF IV AMP1
–
RF IV AMP2
FE BIAS 37
TTL
+
IIL
–
F 38
F IV AMP
E 39 –
FZC COMP
+
E IV AMP
EI 40
TE AMP
VEE 41
TEO 42
LPFI 43
TEI 44
DFCT
ATSC 45 • WINDOW COMP
ATSC
TZC 46
TDFCT 47
DFCT
–
VC 48
1 2 3
31 30 29 28
–
+
+
+
+ +
+
MIRR
DFCT
• IIL DATA RESISTOR • INPUT SHIFT RESISTOR
• ADDRESS DECODER
• OUTPUT DECODER
–
TOG1-3 FS1-4 TG1-2 TM1-7 PS1-4
BAL1-3
+ +
–
• TRACKING
• PHASE
HPF COMP LPF COMP
COMPENSATION
–
TM6
TG1
TM5
+
TM4
–
• FCS PHASE
TZC COMP
COMPENSATION
TM3
FS1
TM1
TM7
FS2
–
FS4
4 5 6 7 8 9 10
— 51 —
IC102 BA6397FP
27 26 25
OUT1A 1
OUT1B 2
LEVEL
SHIFT
3
IN1A
IN1B 4
5
TR-B
REG 0 6
XRST 7
IIL 24 SENS
TTL 23 C. OUT
GND 8
IN2A 9
22 XRST
IN2B 10
LEVEL
TTL
SHIFT
21 DATA
OUT2A 11
20 XLT
IIL
OUT2B 12
19 CLK
GND 13
OP-OUT 14
18 VCC
IC103 CXD2507AQ
64 63 62
• ISET 17 ISET
SERVO AUTO
FOK 1
SEQUENCER
–
MON 2
16 SL 0
+
MDP 3
CPU
MDS 4
14 INTERFACE
15 SL M
LOCK 5
6
TEST
7
FILO
DIGITAL
14 SL P FILI 8
TM2
PLL
9
PCO
VSS 10
11
AVSS
13 TA O
ASYMMETRY
–
CLTV 12
CORRECTOR
13
AVDD
5
RF 14
BIAS 15
ASYI 16
ASYO 17
18
ASYE
WDCK 19
11 12
20 21 22
28 GND
27 OUT4A
THERMAL
26
OUT4B
SHUT DOWN
LEVEL
SHIFT
25 IN4A
24
IN4B
23 VC
22 V CC
21 V
CC
20 IN3B
19 IN3A
LEVEL
SHIFT
18 OUT3B
17 OUT3A
16 OP+
15 OP–
61 60 59 58 57 56 55 54 53 52
51 DATA
5
XRST
50
49 SENS
SUB CODE
MUTE
PROCESSOR 48
DIGITAL
47 SQCK
CLV
4
46 SQSO
45 EXCK
EFM
44 SBSO
DEMODULATOR
43 SCOR
42 V
SS
3
41 WFCK
40 EMPH
D/A DIGITAL
39 DOUT
INTERFACE OUT
C4M
38
6
37 FSTT
XTSL
36
16K ERROR
35 XTAO
RAM CORRECTOR
34 XTAI
3
33 MNTO
23 24 25 26 27 28 29 30 31 32
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