Pin No.
Pin Name
70
XIN
71
VSS
72
XOUT
73
RESET
74
CH
75
BUSY
76
TEST
77
GRAD R1
78
I2C DATA
79
I2C CLK
80
GRAD R2
I/O
I
System clock input terminal (12.5 MHz)
—
Ground terminal
O
System clock output terminal (12.5 MHz)
System reset signal input from the reset signal generator (IC502) "L": reset
I
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
O
Not used (open)
I
Not used (fixed at "L")
I
Connected to ground
O
Not used (open)
I/O
Communication data bus with the system controller (IC501)
Communication data reading clock signal input or transfer clock signal output with the system
I/O
controller (IC501)
O
Not used (open)
Function
– 71 –