Page 1 Hard Disk Drive Specification Deskstar T7K500 3.5 inch hard disk drive Models: HDT725025VLAT80 HDT725025VLA380 HDT725025VLA360 HDT725030VLAT80 HDT725030VLA380 HDT725030VLA360 HDT725032VLAT80 HDT725032VLA380 HDT725032VLA360 HDT725040VLAT80 HDT725040VLA380 HDT725040VLA360 HDT725050VLAT80 HDT725050VLA380 HDT725050VLA360 Version 1.2 06 December 2006...
Page 3 Hard Disk Drive Specification Deskstar T7K500 3.5 inch hard disk drive Models: HDT725025VLAT80 HDT725025VLA380 HDT725025VLA360 HDT725030VLAT80 HDT725030VLA380 HDT725030VLA360 HDT725032VLAT80 HDT725032VLA380 HDT725032VLA360 HDT725040VLAT80 HDT725040VLA380 HDT725040VLA360 HDT725050VLAT80 HDT725050VLA380 HDT725050VLA360 Version 1.2 06 December 2006...
Page 4 It is possible that this publication may contain reference to, or information about, Hitachi products (machines and programs), programming, or services that are not announced in your country. Such references or information must not be construed to mean that Hitachi intends to announce such Hitachi products, programming, or services in your country.
Page 5: Table Of Contents
Table of Contents 1.0. General.........................1 1.1. Introduction......................1 1.2. References......................1 1.3. Abbreviations......................1 1.4. Caution........................3 2.0. General features of the drive ..................5 3.0. Fixed-disk subsystem description................9 3.1. Control electronics....................9 3.2. Head disk assembly ..................... 9 3.3. Actuator ........................ 9 4.0.
Page 6 6.9.3 Host Terminating Read DMA ..............34 6.9.4 Device Terminating Read DMA ...............35 6.9.5 Initiating Write DMA ................36 6.9.6 Device Pausing Write DMA ..............37 6.9.7 Device Terminating Write DMA ...............38 6.9.8 Host Terminating Write DMA ..............39 6.10. Addressing of registers ..................40 6.10.1 Cabling ....................40 7.0.
Page 7 7.9.4 Safe handling .....................64 7.9.5 Environment ....................64 7.9.6 Secondary circuit protection ..............64 7.10. Electromagnetic compatibility................65 7.10.1 CE Mark ....................65 7.10.2 C-TICK mark ...................65 7.10.3 BSMI mark ....................65 7.10.4 MIC Mark ....................65 7.11. Packaging......................65 7.11.1 Substance restriction requirements ............65 8.0.
Page 8 10.6.5 S.M.A.R.T. commands ................83 10.6.6 Off-line read scanning ................83 10.6.7 Error log ....................84 10.6.8 Self-test ....................84 10.7. Security Mode Feature Set................85 10.7.1 Security mode ..................85 10.7.2 Security level ...................85 10.7.3 Passwords ....................86 10.7.4 Operation example ...................86 10.7.5 Command table ..................90 10.8.
Page 9 12.3.1 DEVICE CONFIGURATION RESTORE (Subcommand C0h) ..137 12.3.2 DEVICE CONFIGURATION FREEZE LOCK (subcommand C1h) ..137 12.3.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h) ..138 12.3.4 DEVICE CONFIGURATION SET (subcommand C3h) ......138 12.4. Download Microcode (92h)................141 12.5. Execute Device Diagnostic (90h) ..............142 12.6.
Page 10 12.37.3 Advanced Power Management ............212 12.37.4 Automatic Acoustic Management ............214 12.38. Set Max ADDRESS (F9h)................215 12.38.1 Set Max Set Password (Feature=01h) ..........217 12.38.2 Set Max Lock (Feature=02h) ..............218 12.38.3 Set Max Unlock (Feature = 03h) ............219 12.38.4 Set Max Freeze Lock (Feature = 04h) ..........220 12.39.
Page 11 List of Tables Table 1: Formatted capacities..................11 Table 2: Mechanical positioning performance ............13 Table 3: Word Wide Name Assignment..............13 Table 4: Command overhead..................15 Table 5: Mechanical positioning performance ............15 Table 6: Full stroke seek time..................16 Table 7: Single track seek time...................16 Table 8: Latency Time....................17 Table 9: Drive ready time ...................17 Table 10: Description of operating modes..............17...
Page 12 Table 44: Random Vibration PSD profile breakpoints (nonoperating)......61 Table 45: Sinusoidal shock wave ................62 Table 46: Rotational shock ..................62 Table 47: Sound power levels..................63 Table 48: Register Set....................69 Table 49: Alternate Status Register ................70 Table 50: Device Control Register ................71 Table 51: Drive Address Register................72 Table 52: Device Head/Register.................72 Table 53: Error Register .....................73...
Page 13 Table 90: Read Buffer (E4h) ..................162 Table 91: Read DMA command (C8h/C9h).............163 Table 92: Read DMA Ext Command (25h)..............165 Table 93: Read Log Ext Command (2Fh) ..............167 Table 94: Log Address Definition ................168 Table 95: General Purpose Log Directory..............169 Table 96: Extended Comprehensive SMART Error Log .........170 Table 97: Extended Error log data structure.............170 Table 98: Command data structure................171 Table 99: Error data structure ...................171...
Page 14 Table 136: Set Multiple command (C6h) ..............223 Table 137: Sleep command (E6h/99h) ..............224 Table 138: S.M.A.R.T. Function Set command (B0h)..........225 Table 139: Device Attribute Data Structure .............230 Table 140: Individual Attribute Data Structure ............230 Table 141: Device Attribute Thresholds Data Structure ..........234 Table 142: Individual Threshold Data Structure ............234 Table 143: S.M.A.R.T.
Page 15: General
1.0 General 1.1 Introduction This document describes the specifications of the Deskstar T7K500, a 3.5-inch hard disk drive with ATA interface and a rotational speed of 7200 RPM. HDT725025VLAT80 / A380 / A360 250.0 GB HDT725030VLAT80 / A380 / A360 300.0 GB HDT725032VLAT80 / A380 / A360 320.0 GB...
Page 16 Federal Communications Commission field replacement unit gravity (a unit of force) (32 ft/sec) per Hertz 1,000,000,000 bits 1,000,000,000 bytes ground hexadecimal hard disk drive Hertz Input integrated lead suspension Input/Output International Standards Organization 1,000 bytes Kbpi 1000 bits per inch kgf-cm kilogram (force)-centimeter kilohertz...
Page 17: Caution
second SELV secondary low voltage S.M.A.R.TSelf-Monitoring, Analysis, and Reporting Technology tracks per inch track transistor-transistor logic Underwriters Laboratory volt Verband Deutscher Electrotechniker watt 3-state transistor-transistor tristate logic 1.4 Caution • Do not apply force to the top cover. • Do not cover the breathing hole on the top cover. •...
Page 18 Deskstar T7K500 Hard Disk Drive Specification...
Page 19: General Features Of The Drive
2.0 General features of the drive • Formatted capacities of 250 GB to 500 GB • Spindle speeds of 7200 RPM • Fluid Dynamic Bearing motor • Enhanced IDE interface • Sector format of 512 bytes/sector • Closed-loop actuator servo •...
Page 20 Deskstar T7K500 Hard Disk Drive Specification...
Page 21 Part 1. Functional specification Deskstar T7K500 Hard Disk Drive specification...
Page 22 Deskstar T7K500 Hard Disk Drive Specification...
Page 23: Fixed-Disk Subsystem Description
3.0 Fixed-disk subsystem description 3.1 Control electronics The drive is electronically controlled by a microprocessor, several logic modules, digital/analog modules, and var- ious drivers and receivers. The control electronics performs the following major functions: • Controls and interprets all interface signals between the host controller and the drive. •...
Page 24 Deskstar T7K500 Hard Disk Drive Specification...
Page 25: Drive Characteristics
4.0 Drive characteristics 4.1 Default logical drive parameters Table 1: Formatted capacities Description HDT725025VLxxxx HDT725032VLxxxx HDT725030VLxxxx Physical Layout Label capacity (GB) Bytes per sector Sectors per track 672-1280 720-1440 720-1440 Number of heads Number of disks Data sectors per cylinder 2688-5120 2880-5760 2880-5760...
Page 26 Notes: Number of cylinders: For drives with capacities greater than 8.45 GB the Identify Device information word 01 limits the number of cylinders to 16, 383 per the ATA specification. Logical layout: Logical layout is an imaginary drive parameter (that is, the number of heads) which is used to access the drive from the system interface.
Page 27: Data Sheet
Table 3: Word Wide Name Assignment Description 250 GB 300/320 400 GB 500 GB 250 GB 300/320 400 GB 500 GB Organization Hitachi GST Manufacturing Sriracha Plant Thailand China Plant, China Site Product Deskstar T7K500 000CCAh SHBU Block 210h 211h...
Page 28: Cylinder Allocation
This cylinder contains the user data which can be sent and retrieved via read/write commands and a spare area for reassigned data. Spare cylinder The spare cylinder is used by Hitachi Global Storage Technologies manufacturing and includes data sent from a defect location. Deskstar T7K500 Hard Disk Drive Specification...
Page 29: Performance Characteristics
4.5 Performance characteristics Drive performance is characterized by the following parameters: • Command overhead • Mechanical head positioning Seek time Latency • Data transfer speed • Buffering operation (Look ahead/Write cache) All the above parameters contribute to drive performance. There are other parameters that contribute to the perfor- mance of the actual system.
Page 30: Table 6: Full Stroke Seek Time
The terms “Typical” and “Max” are used throughout this document and are defined as follows: Typical The average of the drive population tested at nominal environmental and voltage conditions. Maximum value measured on any one drive over the full range of the environmental and voltage conditions.
Page 31: Table 8: Latency Time
4.5.2.4 Average latency Table 8: Latency Time Rotational speed Time for one Average latency (RPM) revolution (ms) (ms) 7200 RPM 4.17 4.5.3 Drive ready time Table 9: Drive ready time Power on to ready Typical (sec) Maximum (sec) 250-320 GB models 400/500 GB models Ready The condition in which the drive is able to perform a media access command (for exam-...
Page 32: Table 11: Mode Transition Times
4.5.4.2 Mode transition time Table 11: Mode transition times Transition time (sec) From Typical Maximum Standby Idle 0 ---> 7200 (3 disks) Idle Standby 7200 ---> 0 Immediately Immediately Standby Sleep Immediately Immediately Sleep Standby Immediately Immediately Unload idle Idle 7200 Idle Unload idle...
Page 33: Defect Flagging Strategy
5.0 Defect flagging strategy Media defects are remapped to the next available sector during the Format Process in manufacturing. The mapping from LBA to the physical locations is calculated by an internally maintained table. Shipped format • Data areas are optimally used. •...
Page 34 Deskstar T7K500 Hard Disk Drive Specification...
Page 35: Electrical Interface Specification
6.0 Electrical interface specification 6.1 Connector location Refer to the following illustration to see the location of the connectors PATA SATA Deskstar T7K500 Hard Disk Drive Specification...
Page 36: Pin Dc Power Connector
6.1.1 4 pin DC power connector The DC power connector is designed to mate with AMP part number 1-480424-0 using AMP pins part number 350078-4 (strip), part number 61173-4 (loose piece), or their equivalents. Pin assignments are shown in the figure below.
Page 37: Table 13: Signal Definitions
6.2 Signal definitions (PATA model) The pin assignments of interface signals are listed as follows: Table 13: Signal definitions SIGNAL Type SIGNAL Type RESET- 3–state DD08 3–state 3–state DD09 3–state 3–state DD10 3–state 3–state DD11 3–state 3–state DD12 3–state 3–state DD13 3–state 3–state...
Page 38: Signal Descriptions
6.3 Signal descriptions Table 14: Special signal definitions for Ultra DMA Special Definition Conventional (for Ultra DMA) Definition DDMARDY- IORDY Write Operation HSTROBE DIOR- STOP DIOW- HDMARDY- DIOR- Read Operation DSTROBE IORDY STOP DIOW- DD00–DD15 A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Regis- ter and ECC access.
Page 39 DASP- This is a time-multiplexed signal which indicates that a drive is active or that device 1 is present. This signal is driven by an Open-Drain driver and internally pulled up to 5 volts through a 10 kW resistor. During a Power-On initialization or after RESET- is negated, DASP- shall be asserted by Device 1 within 400 ms to indicate that device 1 is present.
Page 40 DMACK- This signal shall be used by the host in response to DMARQ to either acknowledge that data has been accepted, or that data is available. This signal is internally pulled up to 5 Volt through a 15kΩ resistor with a resistor tolerance value of –50% to +100%.
Page 41: Interface Logic Signal Levels (Pata Model)
6.4 Interface logic signal levels (pata model) The interface logic signals have the following electrical specification: Input High Voltage 2.0 V min Inputs Input Low Voltage 0.8 V max. Output High Voltage 2.4 V min. Outputs: Output Low Voltage 0.5 V max. 6.5 Signal definition (SATA model) SATA has receivers and drivers to be connected to Tx+/- and Rx +/- Serial data signal.
Page 42: Rx+ / Rx
6.5.2 RX+ / RX- These signals are the inbound high-speed differential signals that are connected to the serial ATA cable. The following standard shall be referenced about signal specifications. Serial ATA: High Speed Serialized AT Attachment Revision 1.0a 7-January -2003 Serial ATA-II Electrical Specification 1.0 26-May-2004.
Page 43: Reset Timings
6.6 Reset timings Table 15: System reset timing chart RESET- BUSY Table 16: System reset timing PARAMETER DESCRIPTION Min (usec) Max (sec) RESET low width RESET high to not BUSY Deskstar T7K500 Hard Disk Drive Specification...
Page 44: Pio Timings
6.7 PIO timings The PIO cycle timings meet Mode 4 of the ATA/ATAPI-6 description. Table 17: PIO cycle timings chart PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time – Address valid to DIOR-/DIOW- setup – DIOR-/DIOW- pulse width – DIOR-/DIOW- recovery time –...
Page 45: Multi-Word Dma Timings
• In the event that a host reads the status register only before the sector or block transfer DRQ interval, the DRQ interval 4.2 µs • In the event that a host reads the status register after or both before and after the sector or block transfer, the DRQ interval is 11.5 µs 6.8 Multi-word DMA timings The Multiword DMA timings meet Mode 2 of the ATA/ATAPI-6 description.
Page 46: Ultra Dma Timings
6.9 Ultra DMA timings The Ultra DMA timings meet Mode 0, 1, 2, and 4, 5 and 6 of the Ultra DMA Protocol. 6.9.1 Initiating Read DMA DMARQ DMACK- tACK tENV STOP tACK tENV t2CYC HDMARDY- tZIORDY tCYC tCYC DSTROBE tZAD DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxx...
Page 47: Host Pausing Read Dma
6.9.2 Host Pausing Read DMA Table 21: Ultra DMA cycle timing chart (Host pausing Read) DMARQ DMACK- STOP HDMARDY- tRFS DSTROBE Table 22: Ultra DMA cycle timings (Host pausing Read) PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 MODE 6 DESCRIPTION...
Page 48: Host Terminating Read Dma
6.9.3 Host Terminating Read DMA Table 23: Ultra DMA cycle timing chart (Host pausing Read) DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tRFS tIORDYZ DSTROBE RD Data xxxxxxxxxxxxxxxxxx xxxxxxxxxxx DD(15:0) tZAH Device drives DD Host drives DD Table 24: Ultra DMA cycle timings (Host pausing Read) PARAMETER DESCRIP- MODE 0 MODE 1...
Page 49: Device Terminating Read Dma
6.9.4 Device Terminating Read DMA Table 25: Ultra DMA cycle timing chart (Host pausing Read) DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tIORDYZ DSTROBE xxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) tZAH Host drives DD Device drives DD Table 26: Ultra DMA cycle timings (Device Terminating Read) PARAMETER DESCRIP- MODE 0 MODE 1...
Page 50: Initiating Write Dma
6.9.5 Initiating Write DMA Table 27: Ultra DMA cycle timing chart (Initiating Write) DMARQ DMACK- tENV tACK STOP tZIORDY t2CYC DDMARDY- tCYC tCYC tACK HSTROBE DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx WT Data WT Data WT Data Host drives DD PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4...
Page 51: Device Pausing Write Dma
6.9.6 Device Pausing Write DMA Table 28: Ultra DMA cycle timing chart (Device Pausing Write) DMARQ DMACK- STOP DDMARDY- tRFS HSTROBE Table 29: Ultra DMA cycle timings (Device Pausing Write) PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 MODE 6 DESCRIPTION...
Page 52: Device Terminating Write Dma
6.9.7 Device Terminating Write DMA Table 30: Ultra DMA cycle timing chart (Device Terminating Write) DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK tRFS HSTROBE xxx WT Data xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5...
Page 53: Host Terminating Write Dma
6.9.8 Host Terminating Write DMA Table 32: Ultra DMA cycle timing chart (Host Terminating Write) DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK HSTROBE xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD Table 33: Ultra DMA cycle timings (Host Terminating Write) PARAMETER MODE 0 MODE 1 MODE 2...
Page 54: Addressing Of Registers
6.10 Addressing of registers The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's I/O space. Two chip select lines (CS0– and CS1–) and three address lines (DA0–2) are used to select one of these registers, while a DIOR–...
Page 55 Part 2. Interface specification Deskstar T7K500 Hard Disk Drive Specification...
Page 56 Deskstar T7K500 Hard Disk Drive Specification...
Page 57: Specification
7.0 Specification 7.1 Jumper settings 7.1.1 Jumper pin location Jumper pins 7.1.2 Jumper pin identification Pin I Pin A DERA001.prz Pin B 7.1.3 Jumper pin assignment There are four jumper settings as shown in the following sections: • 16 logical head default (normal use) •...
Page 58 • Power up in standby Within each of these four jumper settings the pin assignment selects Device 0, Device 1, Cable Selection, or Device 1 Slave Present as shown in the following figures. The Device 0 setting automatically recognizes device 1 if it is present. The Device 1 Slave Present setting is for a slave device that does not comply with the ATA specification.
Page 59: Jumper Positions
CS/SP RS V 7.1.4 Jumper positions 7.1.4.1 16 logical head default (normal use) The figure below shows the jumper positions used to select Device 0, Device 1, Cable Selection, or Device1 (Slave) Present. DEVICE 0 (Master) DEVICE 1 (Slave) CABLE SEL DEVICE 1 (Slave) Present Shipping Default Condition...
Page 60 Notes: 1. To enable the CSEL mode (Cable Selection mode) the jumper block must be installed at E-F. In the CSEL mode the drive address is determined by AT interface signal #28 CSEL as follows: • When CSEL is grounded or at a low level, the drive address is 0 (Device 0). •...
Page 61: Table 35: Jumper Positions For Capacity Clip To 32Gb
7.1.4.3 Capacity clip to 32GB The figure below shows the jumper positions used to select Device 0, Device 1, Cable Selection, or Device1 (Slave) Present while setting the drive capacity down to 32 GB for the purpose of compatibility. Table 35: Jumper positions for capacity clip to 32GB DEVICE 0 (M aster) DEVICE 1...
Page 62 Notes: 1. These jumper settings are used for limiting power supply current when multiple drives are used. 2. Command to spin up is SET FEATURES (subcommand 07h). Refer to 12.28 Set Features. 3. To enable the CSEL mode (Cable Selection mode) the jumper block must be installed at E-F. In the CSEL mode the drive address is determined by AT interface signal #28 CSEL as follows: •...
Page 63: Environment
7.2 Environment 7.2.1 Temperature and humidity Table 37: Temperature and humidity Operating conditions Temperature 0C to 60ºC (See note below) Relative humidity 8 to 90%, non-condensing Maximum wet bulb temperature 29.4ºC, non-condensing Maximum temperature gradient 20ºC/hour Altitude –300 to 3,048 m Non-operating conditions Temperature –40C to 65ºC...
Page 64: Corrosion Test
Table 38: Limits of temperature and humidity Environment Specification 36C/95% 31C/90% Wet Bulb 35C Wet Bulb 29.4C Non-operating Operating 65C/14% 60C/10% Temperature (C) Note: Storage temperature range is 0° to 65°. 7.2.2 Corrosion test The drive shows no sign of corrosion inside and outside of the hard disk assembly and is functional after being sub- jected to seven days at 50°C with 90% relative humidity.
Page 65: Table 39: Input Voltage
7.3.1 Input voltage Table 39: Input voltage Input voltage supply During run and spin up Absolute max spike voltage Supply rise time +5 V 5 V ± 5% –0.3 to 5.5 V 0 to 5 sec +12 V 12 V + 10% –8% –0.3 to 15 V 0 to 5 sec To avoid damage to the drive electronics, power supply voltage spikes must not exceed specifications.
Page 66: Table 40: Power Supply Current Of 80Gb And 40Gb Models
7.3.2 Power supply current (typical) Table 40: Power supply current Power supply current of +5 Volts [mA] +12 Volts [mA] Total 400 / 500 GB PATA models (values in milliamps. RMS) Pop Mean Std Dev Pop Mean Std Dev Idle average Idle ripple (peak-to-peak) Low RPM idle Low RPM idle ripple...
Page 67: Table 41: Power Supply Generated Ripple At Drive Power Connector
Power supply current of +5 Volts [mA] +12 Volts [mA] Total 400 / 500 GB SATA models (values in milliamps. RMS) Pop Mean Std Dev Pop Mean Std Dev Idle average Idle ripple (peak-to-peak) Low RPM idle Low RPM idle ripple Unload idle average Unload idle ripple Random R/W average...
Page 68 During drive start up and seeking 12-volt ripple is generated by the drive (referred to as dynamic loading). If the power of several drives is daisy chained together, the power supply ripple plus the dynamic loading of the other drives must remain within the above regulation tolerance. A common supply with separate power leads to each drive is a more desirable method of power distribution.
Page 69: Reliability
7.4 Reliability 7.4.1 Data integrity No more than one sector is lost at Power loss condition during the write operation when the write cache option is disabled. If the write cache option is active, the data in write cache will be lost. To prevent the loss of customer data, it is recommended that the last write access before power off be issued after setting the write cache off.
Page 70: Mechanical Specifications
7.5 Mechanical specifications 7.5.1 Physical dimensions and weight Deskstar T7K500 Hard Disk Drive Specification...
Page 71 All dimensions in the above figure are in millimeters. The breather hole must be kept uncovered in order to keep the air pressure inside of the disk enclosure equal to external air pressure. The following table lists the dimensions of the drive. Table 42: Physical dimensions and weight Height [mm] 26.1 Max...
Page 72: Mounting Hole Locations
7.5.2 Mounting hole locations The mounting hole locations and size of the drive are shown below. All dimensions are in mm. (6X) Max. penetration 4.5 mm Side View I/F Connector Bottom View (4X) Max. penetration 4.0 mm Thread 6-32 UNC 41.28±0.5 44.45±0.2 95.25±0.2...
Page 73: Connector Locations
7.5.3 Connector locations SATA model 42.73 13.43 (3X) 33.39 5.08+/-0.1 Deskstar T7K500 Hard Disk Drive Specification...
Page 74: Drive Mounting
7.5.4 Drive mounting The drive will operate in all axes (6 directions). Performance and error rate will stay within specification limits if the drive is operated in the other orientations from which it was formatted. For reliable operation, the drive must be mounted in the system securely enough to prevent excessive motion or vibration of the drive during seek operation or spindle rotation, using appropriate screws or equivalent mounting hardware.
Page 75: Table 42: Random Vibration Psd
7.6 Vibration and shock All vibration and shock measurements recorded in this section are made with a drive that has no mounting attach- ments for the systems. The input power for the measurements is applied to the normal drive mounting points. 7.6.1 Operating vibration 7.6.1.1 Random vibration The test is 30 minutes of random vibration using the power spectral density (PSD) levels shown below in each of...
Page 76: Operating Shock
7.6.3 Operating shock The drive meets the following criteria while operating in the conditions described below. The shock test consists of 10 shock inputs in each axis and direction for total of 60. There must be a delay between shock pulses long enough to allow the drive to complete all necessary error recovery procedures.
Page 77: Acoustics
7.8 Identification labels The following labels are affixed to every drive: • A label containing the Hitachi logo, the Hitachi Global Storage Technologies part number and the statement " Made by Hitachi Global Storage Technologies Inc." or Hitachi Global Storage Technol- ogies approved equivalent.
Page 78: Safety
United Nations Environment Program Montreal Protocol, and as ratified by the member nations. Material to be controlled include CFC-11, CFC-12, CFC-113, CFC-114, CFC-115, Halon 1211, Halon 1301 and Halon 2402. Although not specified by the Protocol, CFC-112 is also controlled. In addition to the Protocol Hitachi Global Stor- age Technologies requires the following: •...
Page 79: Electromagnetic Compatibility
The product is declared to be in conformity with requirements of the following EC directives under the sole responsibility of Hitachi Global Storage Technologies Japan Ltd: Council Directive 89/336/EEC on the approximation of laws of the Member States relating to electromagnetic compatibility.
Page 80 Deskstar T7K500 Hard Disk Drive Specification...
Page 81: Introduction
8.0 General 8.1 Introduction This specification describes the host interface of the HDT7250xxVLATy0 hard disk drive. The interface conforms to the Working Document of Information technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-7) Revision 4, dated 23 December 2003, with certain limitations described in Section 8.3 below.
Page 82 Deskstar T7K500 Hard Disk Drive Specification...
Page 83: Registers
9.0 Registers 9.1 Register set Table 49: Register Set Addresses Functions CS0- CS1- READ (DIOR-) WRITE (DIOW-) Data bus high impedance Not used Control block registers Data bus high impedance Not used Data bus high impedance Not used Alternate Status Device Control Device Address Not used...
Page 84: Table 49: Alternate Status Register
9.2 Alternate Status Register Table 50: Alternate Status Register DSC/ SERV This register contains the same information as the Status Register. The only difference between this register and the Status Register is that reading the Alternate Status Register does not imply an interrupt acknowledge or a clear of a pending interrupt.
Page 85: Data Register
9.6 Data Register This register is used to transfer data blocks between the device data buffer and the host. It is also the register through which sector information is transferred on a Format Track command and the configuration information is transferred on an Identify Device command.
Page 86: Table 51: Drive Address Register
9.8 Drive Address Register Table 52: Drive Address Register -WTG -DS1 -DS0 This register contains the inverted drive select and head select addresses of the currently selected drive. Definitions High Impedance. This bit is not a device and will always be in a high impedance state. -WTG Write Gate.
Page 87: Table 53: Error Register
9.10 Error Register Table 54: Error Register IDNF ABRT TK0NF AMNF This register contains the status from the last command executed by the device or a diagnostic code. At the comple- tion of any command, except Execute Device Diagnostic, the contents of this register are always valid even if ERR = 0 is in the Status Register.
Page 88: Sector Number Register
9.13 Sector Number Register This register contains the starting sector number for any disk data access for the subsequent command. The sector number is from one to the maximum number of sectors per track. In LBA mode, this register contains Bits 0–7. At the end of the command this register is updated to reflect the cur- rent LBA Bits 0–7.
Page 89 Index. IDX=1 once per revolution. Because IDX=1 only for a very short time during each revolu- tion, the host may not see it set to 1 even if the host is continuously reading the Status Register. Therefore the host should not attempt to use IDX for timing purposes. Error.
Page 90 Deskstar T7K500 Hard Disk Drive Specification...
Page 91: Table 55: Reset Response Table
10.0 General operation 10.1 Reset response ATA has the following three types of resets: The device executes a series of electrical circuitry diagnostics, spins up the Power On Reset (POR) head disk assembly, tests speed and other mechanical parametric, and sets default values.
Page 92: Table 56: Default Register Values
10.2 Register initialization After a power on, a hard reset, or a software reset, the register values are initialized as shown in the table below. Table 57: Default Register Values Register Default Value Error Diagnostic Code Sector Count Sector Number Cylinder Low Cylinder High Device/Head...
Page 93: Table 58: Reset Error Register Values
10.3 Diagnostic and Reset considerations For each Reset and Execute Device Diagnostic, the diagnostic is done as follows: Power On Reset DASP– is read by Device 0 to determine if Device 1 is present. If Device 1 is present, Device 0 shall read PDIAG– to determine when it is valid to clear the BSY bit and whether Device 1 has powered on or reset without error, otherwise Device 0 clears the BSY bit whenever it is ready to accept commands.
Page 94: Sector Addressing Mode
10.4 Sector Addressing Mode All addressing of data sectors recorded on the device's media is done by a logical sector address. The logical CHS address for HDT7250xxVLATy0 is different from the actual physical CHS location of the data sector on the disk media.
Page 95: Power Management Features
10.5 Power management features The power management feature set permits a host to modify the behavior in a manner which reduces the power required to operate. The power management feature set provides a set of commands and a timer that enables a device to implement low power consumption modes.
Page 96: Table 59: Power Conditions
10.5.4 Interface capability for power modes Each power mode affects the physical interface as defined in the following table: Table 60: Power conditions Mode Interface active Media Active Active Idle Active Standby Inactive Sleep Inactive Ready (RDY) is not a power condition. A device may post ready at the interface even though the media may not be accessible.
Page 97: S.m.a.r.t. Function
10.6 S.M.A.R.T. Function The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated data analysis algorithms to predict the likelihood of near-term degradation or fault condition.
Page 98: Error Log
10.6.7 Error log Logging of reported errors is supported. The device provides information on the last five errors that the device reported as described in the SMART error log sector. The device may also provide additional vendor specific information on these reported errors. The error log is not disabled when SMART is disabled. Disabling SMART disables the delivering of error log information via the SMART READ LOG SECTOR command.
Page 99: Security Mode Feature Set
10.7 Security Mode Feature Set Security Mode Feature Set is a powerful security feature. With a device lock password, a user can prevent unauthorized access to a device even if it is removed from the computer. New commands are supported for this feature as listed below: Security Set Password ('F1'h) Security Unlock...
Page 100: Passwords
10.7.3 Passwords This function can have two types of passwords as described below. Master Password When the Master Password is set, the device does NOT enable the Device Lock Function, and the device CANNOT be locked with the Master Password, but the Master Password can be used for unlocking the locked device.
Page 101: Table 60: Initial Setting
10.7.4.2 User Password setting When a User Password is set, the device will automatically enter lock mode the next time the device is powered on. < Setting password > < No setting password > Set Password with User Password Normal operation Normal operation Power off Power off...
Page 102: Table 61: Usual Operation For Por
is successfully completed. Device Locked mode Unlock CMD Erase Prepare Media Access Non-media Access Command (*1) Command (*1) Erase Unit Password Password Match ? Match ? Reject Complete Enter Device Complete Unlock mode Erase Unit Lock function Disable Normal operation All commands are available Freeze Lock command Enter Device Frozen mode...
Page 103: Table 62: Password Lost
10.7.4.4 User Password lost If the User Password is forgotten and High level security is set, the system user cannot access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.
Page 104: Command Table
10.7.5 Command table This table shows the device's response to commands when the Security Mode Feature Set (Device lock function) is enabled. Command Locked Mode Unlocked Mode Frozen Mode Check Power Mode Executable Executable Executable Configure Stream Command aborted Executable Executable Execute Device Executable...
Page 105 Security Erase Prepare Executable Executable Command aborted Security Erase Unit Executable Executable Command aborted Security Freeze Lock Command aborted Executable Executable Security Set Password Command aborted Executable Command aborted Security Unlock Executable Executable Command aborted Seek Executable Executable Executable Set Features Executable Executable Executable...
Page 106: Host Protected Area Feature
10.8 Host Protected Area Feature Host Protected Area Feature provides a protected area which cannot be accessed via conventional methods. This protected area is used to contain critical system data such as BIOS or system management information. The contents of the main memory of the entire system may also be dumped into the protected area to resume after a system power off.
Page 107: Security Extensions
3. Conventional usage without system software support Since the drive works as a 6.2 GB device, there is no special care required for normal use of this device. 4. Advanced usage using protected area The data in the protected area is accessed by the following steps. i.
Page 108: Table 63: Seek Overlap
10.9 Seek overlap HDT7250xxVLATy0 provides an accurate method for measuring seek time. The seek command is usually used to measure the device seek time by accumulating the execution time for a number of seek commands. With typical implementation of seek command this measurement must include the device and host command overhead. To eliminate this overhead the drive overlaps the seek command as described below.
Page 109: Write Cache Function
10.10 Write cache function Write cache is a performance enhancement whereby the device reports the completion of the write command (Write Sectors, Write Multiple, and Write DMA) to the host as soon as the device has received all of the data into its buffer. The device assumes the responsibility for subsequently writing the data onto the disk.
Page 110: Reassign Function
10.11 Reassign function The Reassign function is used with read commands and write commands. The sectors of data for reassignment are prepared as the spare data sector. This reassignment information is registered internally and the information is available right after completing the Reassign function.
Page 111: Power-Up In Standby Feature Set
10.12 Power-Up in Standby feature set The Power-Up In Standby feature set allows devices to be powered-up into the Standby power management state to minimize inrush current at power-up and to allow the host to sequence the spin-up of devices. This feature set will be enabled and disabled via the SET FEATURES command or the use of a jumper.
Page 112: Advanced Power Management Feature Set (Apm)
10.13 Advanced Power Management feature set (APM) This feature allows the host to select an advanced power management level. The advanced power management level is a scale from the lowest power consumption setting of 01h to the maximum performance level of FEh. Device performance may increase with increasing advanced power management levels.
Page 113: Automatic Acoustic Management Feature Set (Aam)
10.14 Automatic Acoustic Management feature set (AAM) This feature set allows the host to select an acoustic management level. The acoustic management level may range from the lowest acoustic emanation setting of 01h to the maximum performance level of FEh. Device performance and acoustic emanation may increase with increasing acoustic management levels.
Page 114: Table 64: Device Address Map Before And After Set Feature
10.15 Address Offset Feature Computer systems perform initial code loading (booting) by reading from a predefined address on a drive. To allow an alternate bootable operating system to exist in a system reserved area on a drive, this feature provides a Set Features function to temporarily offset the drive address space.
Page 115: Identify Device Data
10.15.2 Identify Device Data Identify Device data, word 83, bit 7 indicates the device supports the Address Offset Feature. Identify Device data, word 86, bit 7 indicates the device is in Address Offset mode. 10.15.3 Exceptions in Address Offset Mode Any commands which access sectors across the original native maximum LBA are rejected with error, even if the access protection is removed by a Set Max Address command.
Page 116: Bit Address Feature Set
10.16 48-bit Address Feature Set The 48-bit Address feature set allows devices with capacities up to 281,474,976,710,655 sectors. This allows device capacity up to 144,115,188,075,855,360 bytes. In addition, the number of sectors that may be transferred by a single command are increased by increasing the allowable sector count to 16 bits. Commands unique to the 48-bit Address feature set are •...
Page 117: Streaming Commands
• Read Stream DMA • Write Stream DMA • Read Log Ext Support of the Streaming feature set is indicated in Identify Device work 84 bit 4. Note that PIO versions of these commands limit the transfer rate (16.6 MB/s), provide no CRC protection, and limit status reporting as compared to a DMA implementation.
Page 118: Read Continuous Bit
10.17.5 Read Continuous bit If the Read Continuous bit is set to one for the command, the device shall transfer the requested amount of data to the host within the Command Completion Time Limit even if an error occurs. The data sent to the host by the device in an error condition is vendor specific.
Page 119: Sct Command Protocol
10.18.0.1 Capability definition Capability Identification is performed by issuing Identify Device command. Word 206 of Identify Data is used to determine if SCT is enabled and which SCT Action Codes are supported. Word Description SCT Command set support 15-12 Vendor Specific 11-6 Reserved Action Code 5 (SCT Data Table) supported...
Page 120 Command Command Block Input Registers (Success) Command Block Input Registers (Error) Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Error Error Sector Count Depends on command Sector Count Extended Status code (LSB) (LSB) Cylinder Low...
Page 121 Command Block Input Registers (Success) Command Block Input Registers (Error) Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Error Error Sector HOB=0 Depends on command Sector HOB=0 Extended Status Code Count (LSB) Count...
Page 122 Action Code Block Data TF Data Description 0000h Reserved 0001h Read/Write Long Sector Access 0002h Write LBA Segment Access 0003h Error Recovery Control 0004h Features Control 0005h Read SCT Data Table 0006h-BFFFh Reserved C000h-FFFFh Vendor Specific 10.18.1.4 Extended Status Code Status Code Definition 0000h...
Page 123 10.18.1.5 Data transfer Once an SCT command has been issued, status can be checked and data can be transferred. Data transfer uses log page E1h. 10.18.1.6 Read/Write SCT Data Using SMART Command Block Output Registers Register 7 6 5 4 3 2 1 0 Feature D5h(Read)/D6h(Write) Sector Count...
Page 124 10.18.1.8 SCT Status Request Once an SCT command has been issued, a status is reported in the ATA registers. This status indicates that the command was accepted or that an error occurred. This ATA status return does not indicate successful completion of the SCT actions.
Page 125: Sct Command Set
10.18.1.10 SCT Status Request Using Read Log Ext Command Block Output Registers Register 7 6 5 4 3 2 1 0 Feature Current Reserved Previous Reserved Sector Count Current Previous LBA Low Current Previous Reserved LBA Mid Current Previous LBA High Current Reserved Previous...
Page 126 Outputs: (TF Data) Command Block Input Registers (Success) Error Sector Count Number of ECC bytes (LSB) Sector Number Number of ECC bytes (MSB) Cylinder Low Number of sectors to transfer (LSB) = 02h Cylinder High Number of sectors to transfer (MSB) = 00h Device/Head reserved Status...
Page 127 Command Block Input Registers (Success) Error Sector Count Reserved Sector Number Reserved Cylinder Low Number of sectors to transfer (LSB) = 01h Cylinder High Number of sectors to transfer (MSB) = 00h Device/Head reserved Status The LBA Segment Access command will begin writing sectors from Start LBA in incrementing order until Count sectors have been written.
Page 128 0008h Background SCT command was aborted because of an interrupting host command 0009h Background SCT command was terminated because of unrecoverable error FFFFh SCT command executing in background Implementation note for Blocking Operation (Function code = 0101h, 0102h) In this mode, the drive will return command completion status when the drive finished the LBA Segment Access operation.
Page 129 Command Block Input Registers (Success) Error Sector Count If Function Code was 0002h, then this is the LSB of the requested recovery limit. Otherwise, this field is reserved. Sector Number If Function Code was 0002h, then this is the MSB of the requested recovery limit. Otherwise, this field is reserved.
Page 130 10.18.2.4 Feature Control Command (action code: 0004h) Inputs (Key Sector) Word Name Value Description Action Code 0004h Set or return the state of drive features described in Error! Reference source not found. Function Code 0001h Set state for a feature 0002h Return the current state of a feature 0003h...
Page 131 Byte Type Field Name Value Description Word Format Version 0002h Status Response format version number Word SCT Version Manufacturer ’s vendor specific implementation version number Word SCT Spec. 0001h Highest level of SCT Technical Report supported DW ord Status Flags Bit 0 : Segment Initialized Flag If this bit is set to 1, an LBA Segment Access command write to all LBAs of...
Page 132: Table 65: Feature Code List
Table 66: Feature Code List Feature Code State Definition 0001h 0001h : Allow write cache operation to be determined by Set Feature command 0002h : Force write cache enabled 0003h : Force write cache disabled If State 0001h is selected, the ATA Set Feature command will determine the operation state of write cache.
Page 133 Feature Code State Definition 0001h 0001h : Allow write cache operation to be determined by Set Feature command 0002h : Force write cache enabled 0003h : Force write cache disabled If State 0001h is selected, the ATA Set Feature command will determine the operation state of write cache.
Page 134 10.18.2.5 SCT Data Table Command (action code: 0005h) Word Name Value Description Action Code 0005h Read a data table Function Code 0001h Read Table Table ID Word See Error! Reference source not found. for a list of data tables 255:2 reserved 0000h Command Block Input Registers (Success)
Page 135 Byte Max Op Limit Maximum recommended continuous operating temperature. This is a one byte 2’s complement number that allows a range from -127°C to +127°C to be specified. 80h is an invalid value. This is a fixed value. Byte Over Limit Maximum temperature limit.
Page 136 Note 1 - The Absolute HDA Temperature History is preserved across power cycles with the requirement that when the drive powers up, a new entry is made in the history queue of 80h, an invalid absolute temperature value. This way an application viewing the history can see the discontinuity in temperature result from the drive being turned off.
Page 137: Command Protocol
11.0 Command protocol The commands are grouped into different classes according to the protocols followed for command execution. The command classes with their associated protocols are defined below. For all commands, the host must first check to see if BSY = 1, and should proceed no further unless and until BSY = 0.
Page 138: Pio Data Out Commands
e. The host reads one sector (or block) of data via the Data Register. f. The device sets DRQ = 0 after the sector (or block) has been transferred to the host. 4. For the Read Long command: a. The device sets BSY = 1 and prepares for data transfer. b.
Page 139 • Write Multiple Ext • Write Sector(s) • Write Sector(s) Ext Execution includes the transfer of one or more 512 byte (> 512 bytes on Write Long) sectors of data from the host to the device. 1. The host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head Registers.
Page 140: Non-Data Commands
11.3 Non-data commands The following are Non-data commands: • Check Power Mode • Device Configuration FREEZE LOCK • Device Configuration RESTORE • Execute Device Diagnostic • Flush Cache • Flush Cache Ext • Idle • Idle Immediate • Initialize Device Parameters •...
Page 141: Dma Commands
11.4 DMA commands The following are DMA commands: • Read DMA • Read DMA Ext • Read Stream DMA • Write DMA • Write DMA Ext • Write Stream DMA Data transfers using DMA commands differ in two ways from PIO transfers: •...
Page 142 Deskstar T7K500 Hard Disk Drive Specification...
Page 143: Table 66: Command Set
12.0 Command descriptions The table below shows the commands that are supported by the device. Table 68: “Command Set (subcommand)” on page 132 shows the subcommands that are supported by each command or feature. Table 67: Command Set 6 5 4 3 2 1 0 Protocol (Hex) Command...
Page 144 6 5 4 3 2 1 0 Protocol Command (Hex) Read Sector(s) 0 0 1 Read Sector(s) 0 0 1 Read Sector(s) Ext 0 0 1 Read Stream DMA 0 0 1 Read Stream PIO 0 0 1 Read Verify Sector(s) 0 1 0 Read Verify Sector(s) 0 1 0...
Page 145 6 5 4 3 2 1 0 Protocol (Hex) Command Standby 1 1 1 Standby* 1 0 0 Standby Immediate 1 1 1 Standby Immediate* 1 0 0 Write Buffer 1 1 1 Write DMA 1 1 0 Write DMA 1 1 0 Write DMA Ext 0 0 1...
Page 146: Table 67: Command Set (Subcommand)
Commands marked * are alternate command codes for previously defined commands Protocol: 1 : PIO data IN command 2 : PIO data OUT command 3 : Non data command 4 : DMA command + : Vendor specific command Table 68: Command Set (subcommand) Command Feature Command (Subcommand)
Page 147 The following symbols are used in the command descriptions. Output registers This indicates that the bit must be set to 0. This indicates that the bit must be set to 1. The device number bit. Indicates that the device number bit of the Device/Head Register should be specified.
Page 148: Table 68: Check Power Mode Command (E5H/98H)
12.1 Check Power Mode (E5h/98h) Table 69: Check Power Mode command (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 149: Table 69: Configure Stream (51H)
12.2 Configure Stream (51h) Table 70: Configure Stream (51h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 150 Feature Current bit 7 (A/R) If set to one, a request to add a new stream. If cleared to zero, a request to remove a previous configured stream is specified. Feature Previous The default Command Completion Time Limit (CCTL). The value is calculated as follows: (Default CCTL) = ((content of the Features register)* (Identify Device words (99:98))) micriseconds.
Page 151: Table 70: Check Power Mode Command (E5H/98H)
12.3 Device Configuration Overlay (B1h) Table 71: Check Power Mode Command (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 152: Device Configuration Identify (Subcommand C2H)
12.3.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h) The DEVICE CONFIGURATION IDENTIFY command returns a 512 byte data structure via PIO data-in transfer. The content of this data structure indicates the selectable commands, modes, and feature sets that the device is capable of supporting. If a DEVICE CONFIGURATION SET command has been issued reducing the capabilities, the response to an IDENTIFY DEVICE or IDENTIFY PACKET DEVICE command will reflect the reduced set of capabilities, while the DEVICE CONFIGURATION IDENTIFY command will reflect the entire set of selectable capabilities.
Page 153: Table 72: Device Configuration Overlay Data Structure
Table 73: Device Configuration Overlay Data structure Word Content 0001h Data Structure revision Multiword DMA modes supported 15-3 Reserved 1 = Multiword DMA mode 2 and below are supported 1 = Multiword DMA mode 1 and below are supported 1 = Multiword DMA mode 0 is supported Ultra DMA modes supported 15-6 Reserved...
Page 154: Table 73: Dco Error Information Definition
Table 74: DCO error information definition Word Content 0001h Data Structure revision Multiword DMA modes supported 15-3 Reserved 1 = Multiword DMA mode 2 and below are supported 1 = Multiword DMA mode 1 and below are supported 1 = Multiword DMA mode 0 is supported Ultra DMA modes supported 15-7 Reserved...
Page 155: Table 74: Downlad Microcode Command (92H)
12.4 Download Microcode (92h) Table 75: Downlad Microcode Command (92h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 156: Table 75: Execute Device Diagnostic Command (90H)
12.5 Execute Device Diagnostic (90h) Table 76: Execute Device Diagnostic command (90h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 157: Table 76: Flush Cache Command (E7H)
12.6 Flush Cache (E7h) Table 77: Flush Cache command (E7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 158: Table 77: Flush Cache Ext Command (Eah)
12.7 Flush Cache Ext (EAh) Table 78: Flush Cache Ext Command (EAh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 159: Table 78: Format Track Command (50H)
12.8 Format Track (50h) Table 79: Format Track command (50h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 160 Input parameters from the device Sector Number In LBA mode this register specifies the current LBA address bits as 0–7 (L = 1). Cylinder High/Low In LBA mode this register specifies the current LBA address bits as 8–15 (Low) and bits 16–23 (High).
Page 161: Table 79: Format Unit Command (F7H)
12.9 Format Unit (F7h) Table 80: Format Unit command (F7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 162: Table 80: Identify Device Command (Ech)
12.10 Identify Device (ECh) Table 81: Identify Device command (ECh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 163: Table 82: Identify Device Information
Table 82: Identify device information Word Content Description 045AH Drive classification, bit assignments: 15 (=0): 1=ATAPI device, 0=ATA device 045EH 14 - 8 : retired 7 (=0): 1=removable cartridge device 6 (=1): 1=fixed device 5 - 3 : retired 2 (=0): Response incomplete retired 0 (=0):...
Page 164 Description Word Content Capabilities, bit assignments: 4000H 15-14(=01) word 50 is valid 13- 1 (=0) Reserved Minimum value of Standby timer (=0) less than 5 minutes 0200H PIO data transfer cycle timing mode DMA data transfer cycle timing mode 0200H Refer Word 62 and 63 Validity flag of the word 0007H...
Page 165: Table 83: Identify Device Information
Table 83: Identify device information Word Content Description 76-79 0000H PATA – reserved SATA capabilities 070xH 15-11(=0) Reserved 10(=1) Phy event counters 9(=1) Receipt of host-initiated interface power management requests 8(=1) Native Command Queuing supported 7-3(=0) Reserved 2(=x) SATA Gen-2 speed (3.0Gbps) supported* 1(=1) SATA Gen-1 speed (1.5Gbps) supported 0(=0)
Page 166 Word Content Description 346BH Command 15 (=0) Reserved 14 (=0) NOP command 13 (=1) READ BUFFER command 12 (=1) WRITE BUFFER command 11 (=0) Reserved 10 (=1) Host Protected Area Feature Set 9 (=0) DEVICE RESET command 8 (=0) SERVICE interrupt 7 (=0) Release interrupt 6 (=1)
Page 167: Table 84: Identify Device Information
Table 84: Identify device information Word Content Description 7FEBH Command set supported 15-14(=01) Word 83 is valid 13 (=1) FLUSH CACHE EXT command supported 12 (=1) FLUSH CACHE command supported 11 (=1) Device Configuration Overlay command supported 10 (=1) 48-bit Address feature set supported 9 (=1) Automatic Acoustic Management 8 (=1)
Page 168: Table 85: Identify Device Information
Table 85: Identify device information Word Content Description xxxxH Command set/feature enabled Words 120:119 are valid. Reserved FLUSH CACHE EXT command supported FLUSH CACHE command supported Device Configuration Overlay command enabled 48-bit Address features set supported Automatic Acoustic Management enabled Set Max Security extensions enabled Set Features Address Offset mode Set Features subcommand required to spin-up...
Page 169: Table 86: Identify Device Information
Table 86: Identify device information Word Content Description 0x7FH Ultra DMA Transfer modes 15- 8(=xx) Current active Ultra DMA transfer mode Reserved (=0) Mode 6 1 = Active 0 = Not Active Mode 5 1 = Active 0 = Not Active Mode 4 1 = Active 0 = Not Active...
Page 170: Table 86: Identify Device Information
Table 87: Identify device information An asterisk (*) in next to the Content field indicates the use of those parameters that are vendor specific Word 94-127 PATA Word Content Description xxxxH Current Automatic Acoustic Management value 15-8 Vendor's Recommended Acoustic Management level 7-0 Current Automatic Acoustic Management value Stream Minimum Request Size Number of sectors that provides optimum performance in streaming environment.
Page 171 Word 97-127 SATA Word Content Description xxxxH Current Automatic Acoustic Management value 15-8 Vendor's Recommended Acoustic Management level 7-0 Current Automatic Acoustic Management value Stream Minimum Request Size Number of sectors that provides optimum performance in streaming environment. This number xxxxH shall be a power of two, with a minimum of eight sectors (4096 bytes).
Page 172 (Both PATA and SATA) Word Content Description xxxxH Security status. Bit assignments 15-9 Reserved 8 Security Level 1= Maximum, 0= High 7-6 Reserved 5 Enhanced erase 1= Support 4 Expired 1= Expired 3 Freeze 1= Frozen 2 Lock 1= Locked 1 Enabled/Disable 1= Enable 0 Capability...
Page 173: Table 87: Idle Command (E3H/97H)
12.11 Idle (E3h/97h) Table 88: Idle command (E3h/97h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 174: Table 88: Idle Immediate Command (E1H/95H)
12.12 Idle Immediate (E1h/95h) Table 89: Idle Immediate command (E1h/95h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 175: Table 89: Initialize Device Parameters Command (91H)
12.13 Initialize Device Parameters (91h) Table 90: Initialize Device Parameters command (91h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 176: Table 90: Read Buffer (E4H)
12.14 Read Buffer (E4h) Table 91: Read Buffer (E4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 177: Table 91: Read Dma Command (C8H/C9H)
12.15 Read DMA (C8h/C9h) Table 92: Read DMA command (C8h/C9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 178 Sector Number This indicates the sector number of the last transferred sector. (L = 0). In LBA mode this register contains the current LBA bits 0–7. (L = 1) Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0). In LBA mode this register contains the current LBA bits 8–15 (Low) and bits16–23 (High).
Page 179: Table 92: Read Dma Ext Command (25H)
12.16 Read DMA Ext (25h) Table 93: Read DMA Ext Command (25h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 180 Cylinder High Current LBA (23:16) Cylinder High Previous LBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24)of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8)of the address of the first unrecoverable error.
Page 181: Table 93: Read Log Ext Command (2Fh)
12.17 Read Log Ext (2Fh) Table 94: Read Log Ext Command (2Fh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 182: Table 94: Log Address Definition
Table 95: Log Address Definition Log Address Content Feature set Type Log directory Read Only Extended Comprehensive SMART error log SMART error logging Ready Only SMART self-test log SMART self-test See Note Extended SMART self-test log SMART self-test Read Only Native Command Queu- Command Error Read Only...
Page 183: Table 95: General Purpose Log Directory
12.17.1 General Purpose Log Directory The figure below defines the 512 bytes that make up the General Purpose Log Directory. Table 96: General Purpose Log Directory Description Bytes Offset General purpose logging version Number of sectors in the log at log address 01h (7:0) Number of sectors in the log at log address 01h (15:8) Number of sectors in the log at log address 01h (7:0) Number of sectors in the log at log address 01h (15:8)
Page 184: Table 96: Extended Comprehensive Smart Error Log
12.17.2 Extended Comprehensive SMART Error Log The figure below defines the format of each of the sectors that comprise the Extended Comprehensive SMART error log. Error log data structure shall not include errors attributed to the receipt of faulty commands such as com- mand codes not implemented by the device or requests with invalid parameters or in valid addresses.
Page 185: Table 98: Command Data Structure
12.17.2.3.2 Data format of command data structure Table 99: Command data structure Description Bytes Offset Device Control register Features register (7:0) (see Note) Features register (15:8) Sector count register(7:0) Sector count register(15:8) Sector number register(7:0) Sector number register(15:8) Cylinder Low register (7:0) Cylinder Low register (15:8) Cylinder High register (7:0) Cylinder High register (15:8)
Page 186: Extended Self-Test Log Sector
Note: bits (7:0) refer to the contents if the register is read with bit 7 of the Device Control register cleared to zero. Bits (15:8) refer to the contents if the register is read with bit 7 of the Device Control register set to one. State shall contain a value indicating the state of the device when the command was issued to the device or the reset occurred as described below.
Page 187: Table 100: Read Stream Error Log
12.17.3.1 Self-test log data structure revision number The value of this revision number shall be 01h. 12.17.3.2 Self-test descriptor index This indicates the most recent self-test descriptor. If there have been no self-tests, this is set to zero. Valid values for the Self-test descriptor index are 0 to 18.
Page 188 Table 101: Read Stream Error Log The Data Structure Version field shall contain a value of 02h indicating the second revision of the structure format. The Read Stream Error Log Count field shall contain the number of uncorrected sector entries currently reportable to the host.
Page 189: Table 101: Stream Error Log Entry
Table 110 defines the format of each entry in the Read Stream Error Log. Table 102: Stream Error Log entry Description Bytes Offset Feature Register Contents Value (current) Feature Register Contents Value (previous) Status Register Contents Value Error Register Contents Value LBA (7:0) LBA (15:8) LBA (23:16)
Page 190: Table 102: Write Stream Error Log
Error Log Index and Write Stream Error Count cleared to zero. The Write Stream Error Log is not reserved across power cycles and hardware reset. Table 103: Write Stream Error Log Description Bytes Offset Structure Version Error Log Index Write Stream Error Log Count Reserved Write Stream Error Log Entry #1 Write Stream Error Log Entry #2...
Page 191: Table 103: Streaming Performance Parameters Log
The host should base its calculations on the larger of its Typical Host Interface Sector Time and the device reported Sector Time values, and on the sum of the device reported Access Time values and any additional latency that only the host is aware of (e.g.
Page 192: Table 106: Read Long (22H/23H)
12.18 Read Long (22h/23h) Table 107: Read Long (22h/23h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 193 Input parameters from the device Sector Count This indicates the number of requested sectors not transferred Sector Number This indicates the sector number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 0–7. (L = 1) Cylinder High/Low This indicates the cylinder number of the transferred sector.
Page 194: Table 107: Read Multiple (C4H)
12.19 Read Multiple (C4h) Table 108: Read Multiple (C4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 195: Table 108: Read Dma Ext Command (25H)
12.20 Read Multiple Ext (29h) Table 109: Read DMA Ext Command (25h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 196 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 197: Table 109: Read Native Max Address (F8H)
12.21 Read Native Max ADDRESS (F8h) Table 110: Read Native Max ADDRESS (F8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - -...
Page 198: Table 110: Read Native Max Address Ext Command (27H)
12.22 Read Native Max Address Ext (27h) Table 111: Read Native Max Address Ext command (27h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 199: Table 111: Read Sectors Command (20H/21H)
12.23 Read Sectors (20h/21h) Table 112: Read Sectors Command (20h/21h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 200 Cylinder High/Low This is the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This is the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 201: Table 112: Read Sector(S) Ext Command (24H)
12.24 Read Sector(s) Ext (24h) Table 113: Read Sector(s) Ext command (24h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 202 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 203: Table 113: Read Stream Dma Command (2Ah)
12.25 Read Stream DMA (2Ah) Table 114: Read Stream DMA Command (2Ah) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 204 Output Parameters To The Device Feature Current URG specifies an urgent transfer request. The Urgent bit specifies that the command should be completed in URG (bit7) the minimum possible time by the device and shall be completed within the specified Command Completion Time Limit.
Page 205 Feature Current The time allowed for the current command's completion is calculated as follows: Command Completion Time Limit = (content of the Feature register Pre- vious) * (Identify Device words (99:98)) useconds If the value is zero, the device shall use the Default Feature Previous CCTL (7:0) CCTL supplied with a previous Configure Stream command for this Stream ID.
Page 206 Feature Current SE (Stream Error) shall be set to one if an error has occurred during the execution of the command and the RC bit is set to one, In this case the LBA returned in the Sector Number registers shall be the address of the first sector in error, and the Sector Count registers shall contain the number of consecutive sectors that may SE (Status, bit 5)
Page 207: Table 114: Read Stream Pio (2Bh)
12.26 Read Stream PIO (2Bh) Table 115: Read Stream PIO (2Bh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 208 the device shall attempt to transfer the amount of data requested within the Command Completion Time Limit event if some data transferred is in error. Output Parameters To The Device Feature Current URG specifies an urgent transfer request. The Urgent bit specifies that the command should be completed in the minimum URG (bit7) possible time by the device and shall be completed within the...
Page 209 Feature Current The number of continuous sectors to be transferred low order, Sector Count Current bits (7:0) The number of continuous sectors to be transferred high Sector Count Previous order, bits (15:8). If zero is specified in the Sector Count register, then 65,536 sectors will be transferred.
Page 210: Table 115: Read Verify Sectors (40H/41H)
12.27 Read Verify Sectors (40h/41h) Table 116: Read Verify Sectors (40h/41h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 211 Cylinder High/Low This is the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This is the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 212: Table 116: Read Verify Sectors Ext Command (42H)
12.28 Read Verify Sectors Ext (42h) Table 117: Read Verify Sectors Ext command (42h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 213 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 214: Table 117: Recalibrate (1Xh)
12.29 Recalibrate (1xh) Table 118: Recalibrate (1xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 215: Table 118: Security Disable Password (F6H)
12.30 Security Disable Password (F6h) Table 119: Security Disable Password (F6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 216: Table 120: Security Disable Password (F3H)
12.31 Security Erase Prepare Table 121: Security Disable Password (F3h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 217: Table 121: Security Erase Unit (F4H)
12.32 Security Erase Unit (F4h) Table 122: Security Erase Unit (F4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 218 At this time the defective sector information and the reassigned sector information for the device are not updated. The security erase prepare command should be completed immediately prior to the Security Erase Unit command. If the device receives a Security Erase Unit command without a prior Security Erase Prepare command the device aborts the security erase unit command.
Page 219: Table 123: Security Freeze Lock Command (F5H)
12.33 Security Freeze Lock (F5h) Table 124: Security Freeze Lock command (F5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 220: Table 124: Security Set Password Command (F1H)
12.34 Security Set Password (F1h) Table 125: Security Set Password command (F1h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 221 Security Level Zero indicates High level. One indicates Maximum level. If the host sets High level and the password is forgotten, the Master Password can be used to unlock the device. If the host sets Maximum level and the user password is for- gotten, only a Security Erase Prepare/Security Unit command can unlock the device and all data will be lost.
Page 222: Table 126: Security Unlock Command (F2H)
12.35 Security Unlock (F2h) Table 127: Security Unlock command (F2h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 223 The user can detect if the attempt to unlock the device has failed due to a mismatched password since this is the only reason that an abort error will be returned by the drive AFTER the password information has been sent to the device.
Page 224: Table 127: Seek Command (7Xh)
12.36 Seek (7xh) Table 128: Seek command (7xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 225: Table 128: Set Features Command (Efh)
12.37 Set Features (EFh) Table 129: Set Features command (EFh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 226: Set Transfer Mode
Note: After the power on reset or hard reset the device is set to the following features as default. Write cache Enable ECC bytes 4 bytes Read look-ahead Enable Reverting to power on defaults Disable Release interrupt Disable 12.37.1 Set Transfer mode When the Feature register is 03h (= Set Transfer mode) the Sector Count Register specifies the transfer mechanism.
Page 227 When Low RPM standby mode is the deepest Power Saving mode and the value in Sector Count register is between 40h and 7Fh, 120 ☯y ☯435 [sec] (default: 120 [sec]) = (x − 40h) 60 +600 (600 ☯y ☯4380) [sec] When Low RPM standby mode is the deepest Power Saving Mode and the value in Sector Count register is between 01h and 3Fh, where...
Page 228: Automatic Acoustic Management
12.37.4 Automatic Acoustic Management When Feature register is 42h (= Enable Automatic Acoustic Management), the Sector Count Register specifies the Automatic Acoustic Management level. Aborted C0-FEh Set to Normal Seek mode 80-BFh Set to Quiet Seek mode 00- 7Fh Aborted The device preserves enabling or disabling of Automatic Acoustic Management and the current Automatic Acous- tic Management level setting across all forms of reset, that is, Power on, Hardware, and Software Resets.
Page 229: Table 129: Set Max Address Command (F9H)
12.38 Set Max ADDRESS (F9h) Table 130: Set Max ADDRESS command (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 230 changed to the native maximum address, the value placed in words (61:60) shall be 268,435,455 and the value placed in words (103:100) shall be the native maximum address. If a host protected area has been established by a Set Max Address Ext command, the device shall return command aborted.
Page 231: Table 130: Set Max Set Password Command
12.38.1 Set Max Set Password (Feature=01h) Table 131: Set Max Set Password command Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - -...
Page 232: Table 132: Set Max Lock Command
12.38.2 Set Max Lock (Feature=02h) Table 133: Set Max Lock command Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 233: Table 133: Set Max Unlock Command (F9H)
12.38.3 Set Max Unlock (Feature = 03h) Table 134: Set Max Unlock command (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data...
Page 234: Table 134: Set Max Freeze Lock (F9H)
12.38.4 Set Max Freeze Lock (Feature = 04h) Table 135: Set Max Freeze Lock (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data...
Page 235: Table 135: Set Max Address Ext Command (37H)
12.39 Set Max Address Ext (37h) Table 136: Set Max Address Ext command (37h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 236 Output parameters to the device Option bit for selection whether nonvolatile or volatile. B=0 is volatile condition. When B=1, MAX Address which is set by the Set Max Address Ext command is preserved by POR. When B=0, MAX Address which is set by the Set Max Address Ext command will be lost by POR.
Page 237: Table 136: Set Multiple Command (C6H)
12.40 Set Multiple (C6h) Table 137: Set Multiple command (C6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 238: Table 137: Sleep Command (E6H/99H)
12.41 Sleep (E6h/99h) Table 138: Sleep command (E6h/99h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 239: Table 138: S.m.a.r.t. Function Set Command (B0H)
12.42 S.M.A.R.T. Function Set (B0h) Table 139: S.M.A.R.T. Function Set command (B0h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 240: S.m.a.r.t. Function Subcommands
12.42.1 S.M.A.R.T. Function Subcommands Code Subcommand S.M.A.R.T. Read Attribute Values S.M.A.R.T. Read Attribute Thresholds S.M.A.R.T. Enable/disable Attribute Autosave S.M.A.R.T. Save Attribute Values S.M.A.R.T. Execute Off-line Immediate S.M.A.R.T. Read Log Sector S.M.A.R.T. Write Log Sector S.M.A.R.T. Enable Operations S.M.A.R.T. Disable Operations S.M.A.R.T.
Page 241 12.42.1.4 S.M.A.R.T. Save Attribute Values (subcommand D3h) This subcommand causes the device to immediately save any updated Attribute Values to the device's Attribute Data sector regardless of the state of the Attribute Autosave feature. Upon receipt of the S.M.A.R.T. Save Attribute Values subcommand from the host, the device asserts BSY, writes any updated Attribute Values to the Attribute Data sector, clears BSY, and asserts INTRQ.
Page 242 Log directory Read Only S.M.A.R.T. Error Log Read Only Extended Comprehensive SMART Error See note S.M.A.R.T. Self-test Log Read Only Extended Self-test Log See note Selective self-test Log Read/Write 80h-9Fh Host vendor specific Read/Write Note: Log addresses 03h and 07h are used by the Read Log Ext and Write Log Ext commands. If these log addresses are used with the SMART Read Log Sector command, the device shall return command aborted.
Page 243 12.42.1.10 S.M.A.R.T. Return Status (subcommand DAh) This command is used to communicate the reliability status of the device upon the request of the host. Upon receipt of the SMART Return Status subcommand the device saves any updated Pre-failure type Attribute Values to the reserved sector and compares the updated Attribute Values to the Attribute Thresholds.
Page 244: Table 139: Device Attribute Data Structure
12.42.2 Device Attribute Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Values subcommand. All multibyte fields shown in these data structures are in byte ordering, that is, the least significant byte occupies the lowest numbered byte address location in the field.
Page 245 Attribute ID Numbers: Any nonzero value in the Attribute ID Number indicates an active attribute. The device supports following Attribute ID Numbers. Attribute Name Indicates that this entry in the data structure is not used Raw Read Error Rate Throughput Performance Spin Up Time Start/Stop Count Reallocated Sector Count...
Page 246 Bit 7 Automatic Off-line Data Collection Status Automatic Off-line Data Collection is disabled. Automatic Off-line Data Collection is enabled. Bits 0–6 represent a hexadecimal status value reported by the device. Value Definition Off-line data collection never started. All segments completed without errors. Off-line data collection is suspended by the interrupting command.
Page 247: Device Attribute Thresholds Data Structure
Off-line Read Scanning implemented bit The device does not support Off-line Read Scanning The device supports Off-line Read Scanning Self-test implemented bit Self-test routing is not implemented Self-test routine is implemented Reserved (0) Selective self-test routine is not implemented 0 Selective self-test routine is not implemented 1 Selective self-test routine is implemented 12.42.2.7 S.M.A.R.T.
Page 248: Table 141: Device Attribute Thresholds Data Structure
The sequence of active Attribute Thresholds will appear in the same order as their corresponding Attribute Values. Table 142: Device Attribute Thresholds Data Structure Description Byte Offset Value Data Structure Revision Number 0010h 1st Device Attribute 30th Device Attribute 15Eh Reserved 16Ah Vendor specific...
Page 249: Table 143: S.m.a.r.t. Log Directory
12.42.4 S.M.A.R.T. Log Directory The following table defines the 512 bytes that make up the S.M.A.R.T. Log Directory. The S.M.A.R.T. Log Direc- tory is S.M.A.R.T. Log Address zero and is defined as one sector long. Table 144: S.M.A.R.T. Log Directory Description Byte Offset...
Page 250: Table 145: Error Log Data Structure
12.42.5.4 Error log data structure The data format of each error log data structure is shown below. Table 146: Error log data structure Description Byte Offset 1st command data structure 2nd command data structure 3rd command data structure 4th command data structure 5th command data structure Error data structure 12.42.5.5 Command data structure...
Page 251: Table 148: Self-Test Log Data Structure
Life time stamp (hours) The state field contains a value indicating the device state when command was issued to the device. Value State Unknown Sleep Standby Active/Idle S.M.A.R.T. Off-line or Self-test x5h-xAh Reserved xBh-xFh Vendor specific The value of ’x’ is vendor specific 12.42.6 Self-test log data structure The following table defines the 512 bytes that make up the Self-test log sector.
Page 252: Selective Self-Test Log Data Structure
12.42.7 Selective self-test log data structure The Selective self-test log is a log that may be both written and read by the host. This log allows the host to select the parameters for the self-test and to monitor the progress of the self-test. The following table defines the contents Deskstar T7K500 Hard Disk Drive Specification...
Page 253: Table 149: Selective Self-Test Log Data Structure
of the Selective self-test log which is 512 bytes long. All multi-byte fields shown in these data structures follow the ATA/ATAPI-7 specifications for byte ordering. Table 150: Selective self-test log data structure Description Bytes Offset Read/Write Data structure revision Starting LBA for test span 1 Ending LBA for test span 1 Starting LBA for test span 2 Ending LBA for test span 2...
Page 254 A S.M.A.R.T. FUNCTION SET command subcommand other than S.M.A.R.T. ENABLE OPERATIONS was received by the device while the device was in a "S.M.A.R.T. Disabled" state. The device is unable to read its Attribute Values or 10h or 40h Attribute Thresholds data structure The device is unable to write to its Attribute Values data structure.
Page 255: Table 151: Standby (E2H/96H)
12.43 Standby (E2h/96h) Table 152: Standby (E2h/96h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 256 When the automatic power down sequence is enabled, the device will enter the Standby mode automatically if the time-out interval expires with no device access from the host. The time-out interval will be reinitialized if there is a drive access before the time-out interval expires. Deskstar T7K500 Hard Disk Drive Specification...
Page 257: Table 152: Standby Immediate (E0H/94H)
12.44 Standby Immediate (E0h/94h) Table 153: Standby Immediate (E0h/94h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 258: Table 153: Write Buffer (E8H)
12.45 Write Buffer (E8h) Table 154: Write Buffer (E8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 259: Table 154: Write Dma (Cah/Cbh)
12.46 Write DMA (CAh/CBh) Table 155: Write DMA (CAh/CBh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 260 Sector Number This indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7. (L = 1) Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High).
Page 261: Table 155: Write Dma Ext Command (35H)
12.47 Write DMA Ext (35h) Table 156: Write DMA Ext Command (35h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 262 Cylinder High Current LBA (23:16) Cylinder High Previous LBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error.
Page 263: Write Dma Fua Ext (3Dh)
12.48 Write DMA FUA Ext (3Dh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 264 Cylinder High Current LBA (23:16) Cylinder High Previous LBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error.
Page 265: Table 156: Write Log Ext Command (3Fh)
12.49 Write Log Ext (3Fh) Table 157: Write Log Ext Command (3Fh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 266: Table 157: Write Long (32H/33H)
12.50 Write Long (32h/33h) Table 158: Write Long (32h/33h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 267 Cylinder High/Low This indicates the cylinder number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This indicates the head number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 24–27.
Page 268: Table 158: Write Multiple (C5H)
12.51 Write Multiple (C5h) Table 159: Write Multiple (C5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 269 Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This indicates the head number of the last transferred sector. (L = 0) In LBA mode this register contains current the LBA bits 24–27.
Page 270: Table 159: Writemultiple Ext Command (39H)
12.52 Write Multiple Ext (39h) Table 160: WriteMultiple Ext Command (39h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 271 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 272: Writer Multiple Fua Ext (Ceh)
12.53 Writer Multiple FUA Ext (CEh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 273 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 274: Table 160: Write Sectors Command (30H/31H)
12.54 Write Sectors (30h/31h) Table 161: Write Sectors command (30h/31h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 275 Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and 16–23 (High). (L = 1) This indicates the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 276: Table 161: Write Sectors Ext
12.55 Write Sector(s) Ext (34h) Table 162: Write Sectors Ext Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 277 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 278: Table 162: Write Stream Dma Command (3Ah)
12.56 Write Stream DMA (3Ah) Table 163: Write Stream DMA Command (3Ah) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 279 Output Parameters To The Device Feature Current URG (bit7) URG specifies an urgent transfer request. The Urgent bit specifies that the command should be completed in the minimum possible time by the device and shall be completed within the specified Command Completion Time Limit. WC (bit6) WC specifies Write Continuous mode enabled.
Page 280: Table 163: Write Stream Pio Command (3Bh)
12.57 Write Stream PIO (3Bh) Table 164: Write Stream PIO Command (3Bh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 281 Output Parameters To The Device Feature Current URG (bit7) URG specifies an urgent transfer request. The Urgent bit specifies that the command should be completed in the minimum possible time by the device and shall be completed within the specified Command Completion Time Limit. WC (bit6) WC specifies Write Continuous mode enabled.
Page 282 Input Parameters From The Device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 283: Timings
13.0 Timings The timing of BSY and DRQ in Status Register are shown in the table below. Table 165: Time-out values INTERVAL START STOP TIME-OUT Power On Device Busy After Power On Status Register BSY=1 400 ns Power On Device Ready After Power On Status Register BSY=1 31 sec...
Page 284 Index 15 logical head default ....................46 48-bit Address Feature ....................102 48-bit Address Feature Set ....................102 Abbreviations ........................1 Acoustics .........................63 Actuator ..........................9 Address Offset ........................100 Address Offset Feature ....................100 Addressing of registers ....................40 Advanced Power Managemen ..................98 Advanced Power Management feature set (APM) ............98 Alternate Status Register ....................70 AT signal connector ......................22 Attribute thresholds ......................83...
Page 285 Connector location ......................21 Connector locations ......................59 Control electronics ......................9 Corrosion test ........................50 CSA approval ........................64 C-TICK mark ........................65 Cylinder allocation ......................13, 14 Cylinder High Register ....................70 Cylinder Low Register ....................70 Data In commands ......................123 Data integrity ........................19, 55 Data Out Commands .......................124 Data Register ........................71 Data Reliability .......................55 Data reliability ........................55...
Page 286 Error log ..........................84 Error Register ........................73 Exceptions in Address Offset Mode ................101 Features Register ......................73 Fixed-disk subsystem ......................9 Fixed-disk subsystem description ...................9 Flammability ........................64 Flush Cache ........................143 Flush to Disk bit ......................103 Formatted capacity ......................11 Functional specification ....................7 General ..........................1 General features ......................5 General operation ......................77 German safety mark ......................64...
Page 287 Interface specification .....................41 Introduction ........................1 Jumper pin assignment ....................43 Jumper pin identification ....................43 Jumper pin location ......................43 Jumper positions ......................45 Jumper settings .......................43 Labels, Identification ......................63 Latency, average ......................17 LBA addressing mode ....................80 Load/unload ........................55 Logical CHS addressing mode ..................80 Master Password setting ....................86 Mechanical positioning ....................15 Mechanical specifications ....................56...
Page 288 Operation example ......................86 Out of band signaling (SATA model) ................28 Packaging ........................65 Passwords ........................86 Performance characteristics ....................15 Physical dimensions ......................56 PIO timings ........................30 Power consumption effiency ..................53 Power management commands ..................81 Power management features ...................81 Power mode ........................81 Power supply current ......................52 Power supply generated ripple at drive power connector ..........53 Power-Up in Standby feature set ..................97 Preventive maintenance ....................55...
Page 289 Secondary circuit protection ...................64 Sector Addressing ......................80 Sector Addressing Mode ....................80 Sector Count Register .....................73 Sector Number Register ....................74 Security extensions ......................93 Security level ........................85 Security mode .........................85 Security Mode Feature Set ....................85 Seek overlap ........................94 Seek time average 15 full stroke 16 single track 16 Self-test ...........................84...
Page 290 Vibration .........................61 Weight ..........................56 World Wide Name Assignment ..................13 Write Buffer ........................244 Write cache function .......................95 Write Continuous bit .......................104 Write DRQ interval time ....................30...
Page 291 References in this publication to Hitachi Global Storage Technologies products, programs or services do not imply that Hitachi Global Storage Technologies intends to make these available in all countries in which Hitachi Global Storage Technologies operates. Product information is provided for information pur- poses only and does not constitute a warranty.

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Hitachi HDT725025VLA380 - Deskstar 0A33423 T7K500 250GB SATA 7200RPM 8MB Cache Hard Drive Specifications

General

General Features of the Drive

Fixed-Disk Subsystem Description

6.0. Electrical Interface Specification

5.0. Defect Flagging Strategy

General Operation

11.0. Command Protocol

12.0. Command Descriptions

Quick Links

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Summary of Contents for Hitachi HDT725025VLA380 - Deskstar 0A33423 T7K500 250GB SATA 7200RPM 8MB Cache Hard Drive