Single Word Dma Data Transfer; Single Word Dma Data Transfer Timing - Fujitsu MPA3017AT Product Manual

5.6.2

Single word DMA data transfer

Figure 5.10 show the single word DMA data transfer timing between the device and the host
system.
DMARQ
DMACK-
DIOR-/DIOW-
Write data
DD0-DD15
Read data
DD0-DD15
Symbol
t0 Cycle time
tC Delay time from DMACK assertion to DMARQ negation
tD Pulse width of DIOR-/DIOW-
tE Data setup time for DIOR-
tF Data hold time for DIOR-
tG Data setup time for DIOW-
tH Data hold time for DIOW-
tI DMACK setup time for DIOR-/DIOW-
tJ DMACK hold time for DIOR-/DIOW-
tC
tI
tE
Timing parameter
Figure 5.10 Single word DMA data transfer timing
C141-E034-02EN
t0
tJ
tD
tG tH
tF
Min. Max. Unit
240 — ns
— 80 ns
120 — ns
— 60 ns
5 — ns
35 — ns
20 — ns
0 — ns
0 — ns
5 - 75