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2-2-4. EMI ESD Filter (U500)
This system uses the EMI ESD filter (U500) to protect the device from noises from IF CONNECTOR part.
2-2-5. IF connetor (IFC500)
It has 18-pin. They are designed to allocate VBAT, V_EXT_CHARGE, USB_D+, +VBUS, USB_D-, TXD1, RXD1,
AUX_ON, EXT1, EXT2 and GND. They connected to power supply IC, microprocessor and signal processor IC.
2-2-6. Battery Charge Management
X700 has a complete constant-current/constant-voltage linear charger for single cell lithium-ion batteries inside.
If Travel Adapter is connected, "V_EXT_CHARGE" begins to provide the charger IC (to battery) with power (current).
When the charging operation is done, "End_of_charge" informs it to PCF5213EL1 to stop the operation. "CHG_ON"
signal enables the charger IC to operate in adequate circumstances.
2-2-7. Audio - Part
X700 has several audio-outputs such as stere speaker, receiver, earphone, etc. RCV_P/N signals from CPU are connected
to the receiver via analog switche (U602). MIC_P/N are connected to the main MIC as well.
YMU762 is a synthesizer LSI for mobile phones. This LSI has a built-in speaker amplifier for outputting sounds that are
used by mobile phones in addition to game sounds and ringing melodies that are replayed by a synthesizer.
YMU762 has built a speaker amplifier of which maximum out is 580 mW at SPVDD=3.6V in this device. There is
Stereophonic analog output for Headphone.
2-2-8. Memory (UME300)
X700 has
KAP17SG00A-D4U4
The
KAP17SG00A-D4U4
Flash Memory and 512Mbit OneNAND Flash and 128Mbit Synchronous Burst U tRAM.
It has 16 bit data line, HD[1~16] which is connected to PCF5213 and MV3315DOQ, also has 24 bit address lines,
HA[1~24]. There are 3 chip select signals, CS0n_FLASH, CS1n_RAM, and CS4n_NAND.
In the wrting process, WEn is fallen to low and it enables writing process to operate. During reading process,
OEn is fallen to low and it enables reading process to operate. Each chip select signals in the PCF5213EL1 choose
different types of memory.
2-2-9. PCF5213EL1 (UCP200)
The PCF5213EL1 is mainly composed of embeded DSP and ARM core. The DSP subsystem includes the Saturn
DSP core with embedded RAM and ROM, and a set of peripherals. It has 24k×16 bits PRAM, 104k×16 bits,
32k×16 XYRAM and 63k×16 XYROM in the DSP.
The ARM946E-S consists of an ARM9E-S processor core, 8 kbyte instruction cache and 8 kbyte data cache,
tightly-coupled ITCM (Instruction Tightly Coupled Memory) and DTCM (Data Tightly Coupled Memory) memories, a
memory protection unit, and an AMBA (Advanced Microcontroller Bus Architecture) AHB (Advanced
High-performance Bus) bus interface with a write buffer.
HD(0:15), data lines and HA(0:23), address lines are connected to KAP17SG00A (memory), MV3018B (image dsp)
and YMU762 (melody IC). It has 64 kbyte SC RAM (0.5 Mbit) and 32 kbyte SC program ROM for bootstrap
loader in the ARM core.
as a memory module.
is a Multi Chip Package Memory which combines 256Mbit Synchronous Burst Multi Bank NOR
SAMSUNG Proprietary-Contents may change without notice
This Document can not be used with out Samsung ' s authorization
2-3
Circuit Description
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