AOpen MX4G Online Manual page 6

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CNR (Communication and Networking Riser)................................................................................................................ 88
CODEC (Coding and Decoding) .................................................................................................................................... 88
DDR (Double Data Rated) SDRAM ............................................................................................................................... 88
DIMM (Dual In Line Memory Module) ............................................................................................................................ 89
DMA (Direct Memory Access)........................................................................................................................................ 89
ECC (Error Checking and Correction) ........................................................................................................................... 89
EDO (Extended Data Output) Memory .......................................................................................................................... 89
EEPROM (Electronic Erasable Programmable ROM).................................................................................................... 90
EPROM (Erasable Programmable ROM) ...................................................................................................................... 90
EV6 Bus ........................................................................................................................................................................ 90
FCC DoC (Declaration of Conformity) ........................................................................................................................... 90
FC-PGA (Flip Chip-Pin Grid Array) ................................................................................................................................ 91
Flash ROM .................................................................................................................................................................... 91
FSB (Front Side Bus) Clock .......................................................................................................................................... 91
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C Bus .......................................................................................................................................................................... 91
IEEE 1394 ..................................................................................................................................................................... 92
Parity Bit ....................................................................................................................................................................... 92
PBSRAM (Pipelined Burst SRAM)................................................................................................................................. 92
PC-100 DIMM ............................................................................................................................................................... 93
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