Superpipeline Architecture - HP Vectra XU 6/XXX Optimization Manual

Hp vectra xu 6/xxx - guide to optimization performance
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CHARACTERISTICS
The Pentium Pro processor uses a 64-bit external data path and a 36-bit address bus. It
integrates two 8 KB level-one cache memories (one for instructions, one for data) and a 256
KB level-two cache. Internally it uses three pipelines and five execution units for instruction
execution.
The table below summarizes the Pentium Pro's characteristics and compares them with those
of the Intel Pentium processor.
Data bus
Address bus
Level-one cache
Level-two cache
Superscaler design
Execution units
Branch prediction
Speculative execution
Out-of-order execution

SUPERPIPELINE ARCHITECTURE

Three Pipelines
The key to the Pentium Pro processor's improved performance is its superpipelined
architecture, which allows it to execute instructions more quickly. Each instruction is executed
in a number of steps through a mechanism called a pipeline. In fact the Pentium Pro processor
uses three pipelines, which allows it to execute more than one instruction simultaneously. Each
Pentium Pro's pipeline consists of up to 14 individual steps.
Pipelines have been used by previous generations of PC processors, such as the i486™ and
the Pentium, to accelerate instruction execution. The reason for this is that x86 compatible
instructions require a number of separate operations to complete. By using a pipeline, these
processors are able to queue instructions through the individual operations so that one
instruction can be completed with each clock cycle.
Micro-ops
The Pentium Pro processor takes the pipeline approach one stage further, by breaking the x86
instructions down into simpler operations called micro-ops. These micro-ops are then executed
through the Pentium Pro's pipelines. The micro-ops are much simpler to handle than x86
instructions, and allow the Pentium Pro processor more flexibility in the way it executes them.
The Pentium Pro can reorder the micro-ops within its pipelines for greater efficiency and can
frequently execute multiple micro-ops in parallel.
Multiple Execution Units
The core step in a processor pipeline is the execution unit; this is where the real work is done.
The pipeline steps before the execution units are mostly concerned with preparing the
instruction for execution. The steps after the execution units involve the re-assembly of data
Intel Pentium Pro
64-bit
36-bit
8 KB data, 8 KB instruction
256 KB
Three-way
Five
Advanced dynamic
Yes
Yes
Intel Pentium
64-bit
32-bit
8 KB data, 8 KB instruction
None
Two-way
Three
Dynamic
No
No

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