Nvidia MFA7U10-H00 Series Manual
Nvidia MFA7U10-H00 Series Manual

Nvidia MFA7U10-H00 Series Manual

400gb/s osfp to 2x200gb/s qsfp56 hdr active optical splitter cable

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MFA7U10-H00x 400Gb/s OSFP to
2x200Gb/s QSFP56 HDR Active Optical
Splitter Cable

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Summary of Contents for Nvidia MFA7U10-H00 Series

  • Page 1 MFA7U10-H00x 400Gb/s OSFP to 2x200Gb/s QSFP56 HDR Active Optical Splitter Cable...
  • Page 2: Table Of Contents

    Table of Contents Introduction................3 Key Features ..................3 Pin Description ................5 OSFP Pin Description ................5 2.1.1 OSFP Module Pad Layout ..............6 QSFP56 Pin Description 200Gb/s End ............7 2.2.1 QSFP56 Module Pad Layout ............... 8 Control Signals (OSFP).................8 Control Signals (QSFP).................9 Diagnostics and Other Features..............9 Specifications................
  • Page 3: Introduction

    1 Introduction  NVIDIA MFA7U10 is an OSFP to 2x QSFP56, 400Gb/s to 2 x 200Gb/s Active Optical splitter Cable (AOC) designed for connecting NVIDIA NDR and 400GbE Ethernet switches with OSFP cage, to legacy 2 HDR/200GbE  switch/HCA QSFP56 cages. The cable is compliant with SFF-8665 for the QSFP56 pluggable solution. It provides connectivity between system units with an OSFP 400Gb/s connector on one side and two separate QSFP56 200Gb/s connectors on the other side, such as a switch and two servers.
  • Page 4 • Single 3.3V power supply • 5W Max power consumption for QSFP56 ends • 10W Max power consumption for the OSFP head end • Hot pluggable • RoHS compliant • SFF-8636 compliant I C management interface...
  • Page 5: Pin Description

    2 Pin Description The AOC is OSFP MSA Specification for OSFP Octal Small Form Factor Pluggable Module Rev. 1.12 compliant, see www.osfpmsa.org. 2.1 OSFP Pin Description Symbol Description Symbol Description Ground Ground Tx2p Transmitter Non-Inverted Rx2p Receiver Non-Inverted Data Input Data Output Tx2n Transmitter Inverted Data...
  • Page 6: Osfp Module Pad Layout

    Symbol Description Symbol Description Rx5p Receiver Non-Inverted Tx5p Transmitter Non-Inverted Data Output Data Input Ground Ground Rx3n Receiver Inverted Data Tx3n Transmitter Inverted Data Output Input Rx3p Receiver Non-Inverted Tx3p Transmitter Non-Inverted Data Output Data Input Ground Ground Rx1n Receiver Inverted Data Tx1n Transmitter Inverted Data Output...
  • Page 7: Qsfp56 Pin Description 200Gb/S End

    2.2 QSFP56 Pin Description 200Gb/s End Symbol Description Symbol Description Ground Ground Ground Ground Tx2n Connected to Port 1 lane Rx2n Connected to Port 1 lane Rx2 Inverted Data Tx2 Inverted Data Tx2p Connected to Port 1 lane Rx2p Connected to Port 1 lane Rx2 Non-Inverted Data Tx2 Non-Inverted Data Ground...
  • Page 8: Qsfp56 Module Pad Layout

    2.2.1 QSFP56 Module Pad Layout   2.3 Control Signals (OSFP) This AOC has CMIS 4.0 (check for update, e.g. to CMIS 5) compliant management interface and OSFP 4.1 (check for update) compliant form factor and interfaces. This implies that the control signals shown in the pad layout are implemented with the following functions: Name Function...
  • Page 9: Control Signals (Qsfp)

    2.4 Control Signals (QSFP) This AOC is SFF-8636 compliant. This means that the control signals shown in the pad layout support the following functions: Name Function Description ModPrsL Output Module Present pin, grounded inside the module. Terminated with pull-up in the host system. Asserted low when the transceiver is inserted, whereby the host detects the presence of the transceiver.
  • Page 10 • Tx/Rx CDR control by default enabled for 100 GbE operation, disable it for 40G operation Digital Diagnostic Monitoring (DDM): • Rx receive optical power monitor for each lane • Tx transmit optical power monitor for each lane • Tx bias current monitor for each lane •...
  • Page 11: Specifications

    3 Specifications 3.1 Absolute Maximum Specifications Absolute maximum ratings are those beyond which damage to the device may occur. Prolonged operation between the operational specifications and absolute maximum ratings is not intended and may cause permanent device degradation. 3.1.1 Absolute Maximum Ratings Parameter Units Supply voltage...
  • Page 12: Electrical Specifications

    3.1.4 Electrical Specifications Parameter (per lane) Units Signaling rate -100 ppm 26.5625 +100 ppm Differential data input swing at mVpp TP1a Differential data output swing at mVpp Near-end ESMW 0.265 Near-end output eye height mVpp Output transition time, 20% to Notes: •...
  • Page 13 3.1.5.1 Mechanical Dimensions 3.1.5.1.1 Option 1 3.1.5.1.2 Option 2...
  • Page 14 3.1.5.1.3 Option 3 3.1.5.2 Connectivity Schematic 400Gb/s Side 2x200Gb/s Side   Port 1   Port 2...
  • Page 15: Labels

    3.2 Labels The following labels are applied on the AOC backshells: 3.2.1 400Gb/s Backshell Label (sample illustration) 3.2.2 200Gb/s Backshell Label (sample illustration) 3.2.3 Backshell Label Legend Symbol Meaning Notes PN – Part Number Length Meter...
  • Page 16: Fiber Cable Jacket Label

    E.g. China or Malaysia Cable length Meter Quick response Serial number (MTYYWWXXSSSSS) code The following label is applied on the cable’s jacket: 3.2.4 Fiber Cable Jacket Label    (sample illustration) Note: The serial number and barcode are for NVIDIA internal use only.
  • Page 17: Splitter Cable Labels Identifying The 2 Qsfp56 Tails

    • EMC: CE, FCC, ICES, RCM, VCCI Ask your NVIDIA FAE for a zip file of the certifications for this product. 3.4 FCC Class A Notice This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.
  • Page 18: Ordering Information

    4 Ordering Information Ordering Part Number Description MFA7U10-H003 NVIDIA AOC splitter, IB twin port HDR, 400Gb/s to 2x200Gb/s, OSFP to 2xQSFP56, 3m  MFA7U10-H005 NVIDIA AOC splitter, IB twin port HDR, 400Gb/s to 2x200Gb/s, OSFP to 2xQSFP56, 5m  MFA7U10-H010 NVIDIA AOC splitter, IB twin port HDR, 400Gb/s to 2x200Gb/s, OSFP to 2xQSFP56, 10m ...
  • Page 19: References

    5 References • NVIDIA_Cable_Management_Guidelines_and_FAQs_Application_Note (MLNX-15-3603) For documentation, please contact your sales representative or the Support team.
  • Page 20: Document Revision History

    6 Document Revision History Revision Date Description Apr. 2024 Updated the Introduction page. Jan. 2024 Updated mechanical drawings and the OPNs in the Ordering Information section. Oct. 2023 Updated Mechanical Specifications to include Cable Jacket LSZH compliance. May. 2023 Updated the Introduction and Specifications chapters. Jan.
  • Page 21 NVIDIA accepts no liability related to any default, damage, costs, or problem which may be based on or attributable to: (i) the use of the NVIDIA product in any manner that is contrary to this document or (ii) customer product designs.
  • Page 22 Technologies Ltd. in the U.S. and in other countries. Other company and product names may be trademarks of the respective companies with which they are associated. Copyright © 2024 NVIDIA Corporation & affiliates. All Rights Reserved.

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