North Star RAM-16-A Manual page 18

delay tap T5 5A pin 8 AC, (TT,"25us)
CYC-ENn/
8C pin 6 AC, (-T-135ns,25us)
RAS-A/
9A pin 4 AC, (-T-40ns,25us)
RAS-B/
9B pin 4 AC, (-T-40ns,25us)
RAS-C/
9C pin 4 AC, (-T-40ns,25us)
RAS-D/
9D pin 4 AC, (-T-40ns,25us)
chip address bit 0
9A pin 5 AC, see note
chip address bit 1
9A pin 7 AC, see note
chip address bit 2 9A pin 6
AC, see note
"
chip address bit 3 9A pin 12
AC, see note
chip address bit 4 9A pin 11 AC, see note
chip address bit 5
9A pin 10 AC, see note
Note: Sometimes (+T,25us) and sometimes (+T-90ns,25us)
If the signals are not as listed, then refer to; the
schematic drawings and trace backwards to locate and correct
the problem.
C4. nse the same setup as step C3. If the computer includes an
auto-jump capability, then it should be set to jump to some
address outside of the range 2000 hex through 5FFF hex (for
example, E800 hex or 0). If the processor board has· a PROM
option at address 0 , i t should be disabled for this step.
with the computer power on, depress and release
th~
reset
switch. The processor should repeatedly execute RST 7
instructions (FF hex) from address 38 hex. This should
cause memory store requests to all addresses (resulting from
the RST instruction stack pushes). Check the following
signals:
17
Signal Location
Description
INSTRTTCT~ON-FETCH/ 4B pin 11 AC, (-220ns,11T)
FETCH/ 4B pin 6 AC, see note 1
STORE/ 4B pin 5 AC, (-220ns twice,llT)
RUNNING-REFESH/
6~
pin 6 AC, (-260ns,11T)
RAS-A/
9A pIn 4 AC, see note 2
RAS-B/ 9B T?in 4 AC, see note 2
RAS-C/ 9C pin 4 AC, see note 2
RAS-Df 9D pin
4
AC, see note 2
chip write enable 9A pin 3 AC, (-220ns twice, 11 T)
CAS-AI 9A pin 15 AC, (-210ns thrice,llT)
CAS-B/
9B pin 15
AC,
(-210ns thrice,llT)
CAS-C/ 9C pin 15 AC, (-210ns thrice,llT)
CAS-Df 9D pin 15 AC, (-210ns thrice,11T)
Note 1: (-100ns,11T) withZ80A, "(-210ns,11T) with 8080.
Note 2.: Sometimes (-225ns,11T) and sometimes·
(-225ns twice, 11 T) .
If the signals are not as listed, refer to the schematic
North Star 16K RAM BOARD