Schematics, Pcb Layout, And Bill Of Materials; Schematics; Figure 5-1. Schematic For A1 Device - Texas Instruments TMCS1123 EVM Series User Manual

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5 Schematics, PCB Layout, and Bill of Materials

Board layouts are not to scale. These figures are intended to show how the board is laid out. The
figures are not intended to be used for manufacturing TMCS1123xEVM PCBs.

5.1 Schematics

Figure 5-1 shows the schematic of the A1 sub board on the TMCS1123AEVM PCB. Only the schematic for
the A1 (25 mV/A) sensitivity variant is demonstrated in this document, as all variants use the same circuit
and same PCB layout. Only U1 changes from board to board. All components associated with the 25-mV/A
sensitivity variants have the nomenclature "_1" appended at the end. The 50-mV/A sensitivity variants have "_2"
appended, the 75-mV/A sensitivity variants have "_3" appended, the 100-mV/A sensitivity variants have "_4"
appended, and the 150-mV/A sensitivity variants have "_5" appended.
GND
VS
C4_1
10µF
R4_1
3
5.60k
R5_1
J1_1
GND
1
VOC
2
3
VOC
861400031YO2LF
R6_1
R7_1
88.7k 10.0k
GND
LBL1_1
PCB Label
THT-14-423-10
Size: 0.65" x 0.20 "
SBAU421B – JUNE 2023 – REVISED DECEMBER 2023
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VS
VS
C1_1
10µF
C3_1
0.1uF
U1_1
VREF
8
5
IN+
1
1 2
IN+1_1
9
IN-1_1 TMCS1123A1QDVGR
IN-
VS
H1_1
SJ-5303 (CLEAR)
Variant/Label Table
Variant LBL2_1 LBL2_2
001 TMCS1123A1 TMCS1123A2
002 TMCS1123B1 TMCS1123B2
003 TMCS1123C1 TMCS1123C2

Figure 5-1. Schematic for A1 Device

Copyright © 2023 Texas Instruments Incorporated
Schematics, PCB Layout, and Bill of Materials
Note
VOUT
C2_1
10pF
GND
R3_1
6
VS VOUT
0
7
VREF OC
4
IN+ FAULT
IN-
GND GND GND
10
NC
VOC
3
GND
GND
GND
H2_1 H3_1
SJ-5303 (CLEAR) SJ-5303 (CLEAR)
LBL2_3 LBL2_4 LBL2_5
TMCS1123A3 TMCS1123A4 TMCS1123A5
TMCS1123B3 TMCS1123B4 TMCS1123B5
TMCS1123C3 TMCS1123C4 TMCS1123C5
VOUT OC
OC_1
VS VS ALERT_1
R1_1 R2_1
10.0k 10.0k
LOGO1_1
CAUTION HOT SURFACE
LOGO2_1
H4_1
SJ-5303 (CLEAR)
DANGER HIGH VOLTAGE
TMCS1123xEVM 11