Start And Stop Bits; Data Bits (Character Length); Parity Checking; Receive Buffer - HP 2624 Manual

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queued by the terminal and sent as a block after the •
key is pressed.
If
handshaking is disabled, the data block is
sent when the. key is pressed. When the DC1 trigger
handshake is enabled, the data block is sent when the next
subsequent <DC1> is received from the host computer.
When the DC 1
I
DC2
I
DC 1 handshake is enabled, pressing the
key causes the terminal to send a <DC2> to the host
computer and then send the data block when the computer
responds with a <DC1 >. The operation of t h e . key is
described in detail in table 3-1 in Section III of this manual.
There are certain functions which always result in a
multicharacter (block) data transfer:
• terminal-to-computer data transfers initiated by an
<ESC>d or some ofthe <ESC>&p sequences.
• user key-to-computer data transfer
(T
or
1' 1
attribute).
• responses to status requests from the host computer.
• responses to cursor sensing requests from the host com-
puter.
The driver program at the host computer must support
whatever handshaking process is being used by the ter-
minal (no handshake, DC 1 trigger handshake, or
DC1
IDC2/DC1
handshake). In the latter case theDC2 must be
recognized as a request to send data and the DC1 must be
sent to trigger the transfer after buffers have been
allocated to receive the data block. Additional software
support may be needed depending upon your need for ter-
minal or device control. The
I
nhHndShkCG) and
I
nh
DC2(H) fields of the Term #1-4 configuration menus
specify which form of handshaking the.terminal will use.
The Terminal Configuration menu is described in Section
II, Configuring the Terminal.
Note: The computer should not be allowed to echo back
information that has been transmitted as a block
from the terminal.
Start and Stop Bits
These hardware-generated bits are used for synchronizing
the transmit and receive devices in an asynchronous
environment. A start bit is a "zero" line state (
+
12V) that
lasts for 1.0 bit time; it is affixed to the beginning of a serial
character bit stream (which may also include a parity bit).
A stop bit is a mark or a "one" line state (-12V) that lasts for
1.0, 1.5, or 2.0 bit times; it is appended to the end of each
serial character bit stream. After the stop bit, the line
remains in the mark state until the next character, sig-
nified by a start bit, is transmitted.
Data Bits (Character Length)
The character length is the number of bits (excluding
parity) used to represent each data character. The
HP
Data Communications
2624A allows you to specify either 7 -bit or 8-bit data codes,
thus accomodating 7 -bit ASCII and 8-bit ASCII (where the
eighth bit is used to specify whether or not the character
code is from the alternate character set).
Parity Checking
In an asynchronous point-to-point environment the
HP
2624A provides a vertical redundancy check (VRC) that is
a character-based error checking mechanism for non-
binary data. With VRC an additional bit is affixed to each
character to provide an expected high-order bit state for
each character. This type of parity generation and check-
ing is a means of determining the validity of data transfer
on a character-by-character basis.
Note that when 8-bit data is being exchanged, parity can-
not be used and the
"Pari
ty" field in the data comm
configuration menu must be set to "NONE".
The
HP
2624A offers the following four types of parity:
1. Os. The high-order bit is always a zero.
2. Is. The high-order bit is always a one.
3. Odd. The high-order bit is set to a zero or a one,
whichever produces an odd number of one bits in the
overall character representation (the seven data bits
plus the eighth parity bit).
4. Even. The high-order bit is set to a zero or a one,
whichever produces an even number of one bits in the
overall character representation (the seven data bits
plus the eighth parity bit).
Receive Buffer
The terminal's receive buffer is a first in/first out (FIFO)
storage area for accepting data from the remote device.
When you are using any type of receive pacing, this buffer
is partitioned into a working buffer and a 40-byte overrun
area. For example, if the specified buffer size is 128 bytes
and receive pacing is being used, the working buffer is 88
bytes long and the overrun area is 40 bytes long. When the
data being received exceeds the working buffer and in-
trudes upon the overrun area, the terminal will exercise its
receive pacing mechanism (send an XDFF, for example, if
XonXoff receive pacing is enabled) at that time to
temporarily halt the flow of data from the remote device.
When enough data has been processed so that the receive
buffer is only half full, the terminal then signals the remote
device to resume transmission (by sending an XON, for
example, ifXonXoff receive pacing is enabled).
There is no equivalent overrun area for transmitting data
from the terminal to the remote device.
7-13

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