Tas5101Se Evm Input Description; Description Of Data Inputs; Input Connector (J1) Pin Functions - Texas Instruments TAS5101SE User Manual

This chapter describes the digital inputs to the TAS5101SE EVM.

1.1 Description of Data Inputs

The input to the TAS5101SE evaluation module (EVM) is a 22-pin connector
(J1) with 0.1" pin spacing. It contains the digital audio input port (I
signal for the TAS5010 modulator, and the SHUTDOWN output signal from the
TAS5101. It contains the 3.3-V logic power supply input for the board. There
is also a digital input, DBSPD, that signals the TAS5010 modulator when the
sample rate exceeds 96 KHz.
Additionally, the other end of the board contains a 2-pin connector for the
PVDD 12-V to 27-V power supply.
Table 1–1. Input Connector (J1) Pin Functions
Pin Name Function
1 PVDD PVDD output to controller board, do not attempt to power this PCB from this pin.
2 DGND Digital ground for logic signals
3 DGND Digital ground for logic signals
4 +3.3 V-In Digital power supply input
5 DGND Digital ground for logic signals
6 +3.3 V-In Digital power supply input
7 DGND Digital ground for logic signals
8 SHUTDOWN Fault indication from TAS5101; set low by short circuit, overtemperature, etc.
9 DGND Digital ground for logic signals
10 RESET_5K Logic low resets the TAS5010 modulator
11 DGND Digital ground for logic signals
12 MCLK_IN Master clock for digital audio input
13 DGND Digital ground for logic signals
14 POWERDOWN Logic low puts the TAS5010 modulator in power-down (low current) mode
15 DGND Digital ground for logic signals
16 DBSPD Logic high signals TAS5010 modulator the presence of a sample rate > 48 kHz
17 DGND Digital ground for logic signals
18 MUTE Logic low stops the PWM data from the TAS5010 to the TAS5101
19 DGND Digital ground for logic signals
20 SCLK Bit clock for audio data
21 SDIN Digital audio data
22 LRCLK Digital audio frame sync, signals either right or left channel data

TAS5101SE EVM Input Description

Chapter 1
2
S), a reset
1-1