Philips MC-77/22 Service Manual page 57

Class-D Circuit Description (
Functional Description:
Refers to the left channel in schematic diagrams.
The first stage of the modulator is an error integrator which
compares the input to the (20 dB amplified) output signal of
the power stage. The difference is leading to a current,
which loads the integrator 7122-A. The second stage
(7122-B) is again integrating, thus creating high gain at low
frequency, which leads to high feedback and low distortion.
The next stage is a comparator, which compares the
integrated voltage to a triangle wave - thus creating a
voltage controlled duty cycle. The comparator is realized by
cascaded gates.
At pin 12 of IC7122 there is a square wave with the same
frequency and duty cycle as the desired output.
The next task is to feed this information to the output FETs.
Both FETs are n-channel types, so they are modulated by
feeding the gate in respect to the source connection. We
use inverters 74LV14 as drivers. The driver for the low-side
FET (7121) is supplied by the negative supply -VL and a
voltage +VL generated by 7115, which is 6.3V higher than
-VL. The digital signal is level-shifted by 7128 to the
negative supply reference. 3142, 6111 and 2126 together is
a delay circuit for rising edges by approx. 50ns, this is to
compensate the switch-off delay of the FETs and ensures
that both FETs are not conducting at the same time.
The high-side FET (7109) is controlled by the inverted signal
taken from pin 2 of 7118-A, which is level-shifted by
transistor 7119. The driver for the high-side FET is supplied
by a floating voltage between the amplifier output -V1L and
+V1L, created by the charge pump 6107, 2114 regulated by
7114 to a 6.3V higher level. The pump is supplied by +5.6V
to ensure supply at start-up (no signal). The necessary
delay for the rising edge is generated by the level-shifter
(mainly the pull-up 3117) and the input capacity of the driver
(pin 13 of 7105-F).
The last stage in the gate driver consists of three gates in
parallel for increased output current for the capacitive load,
afterwards comes a 22R series resistor for soft rising edges
and a transistor for very fast falling edges. This combination
gives the best compromise of efficiency and radiation.
11-3
B P 2002 M
ASED ON OWER
Protection Circuits:
The amplifier is protected against low load impedance
(including short circuit). Current is sensed by shunts 3101,
3130 in both supplies. Overcurrent at the positive supply is
then sensed by 7104, the negative supply overcurrent
triggers 7117, which then also triggers 7104. The collector
current then triggers the monoflop 7122-D and -E, giving a
high pulse at pin 8. This shuts off level-shifter 7128 and
triggers transistor 7129, which draws current into the emitter
resistors (3134, 3127) of level-shifter 7119, which is
therefore also shut off. So both FETs are shut off for approx.
0.2 sec, afterwards the amplifier tries to work again, but if
the overload continues the on-time is only a few cycles.
The shut-off mechanism is also used to shut off the amplifier
during headphone usage; this is done by pulling pin 11 of
7122-E high. The line "AMP_OFF" is controlled by the port
expander 7406.
The loudspeakers are protected against DC voltages
resulting e.g. from defective FETs, voltages greater than +-
2V are detected by 7110+7112 and pull down the
"DC_PROT" line, which disables the speaker relay 1201.
The gain of the class-D amplifier is 20dB, adjusted by the
feedback resistors 3136, 3149 and the input resistors 3139,
3340. The input reference voltage for 7122-A is approx. half
the supply, therefore 3144, 3148 are used for offset
compensation. This compensation can be fine-tuned by the
potentiometer 3306 to reach <1mV DC output.
- 70W C D)
ODULE LASS