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1-4. SCHEMATICS AND SUPPORTING INFORMATION
BAL BOARD SCHEMATIC DIAGRAM (1 OF 18)
1
|
2
|
3
|
4
|
5
|
A
—
B
—
C
—
X_U_BOOT_RST
D
X_M_WDT
CL9001
—
X9000
48MHz
E
—
R9006
680
F
181435611
D+3.3V
D+3.3V
—
GND_D
GND_D
G
—
GND_D
H
—
I
—
M_DIMMER
J
R9073
100
—
K
X_M_HDMI_MUTE
X_M_NAND_WP_IN
—
M_HP_DET
L
M_MS_INS
—
I C9002
74AHC1G08GW-12 5
M
A
VCC
X_U_BOOT_RST
B
—
GND
R9003
N
2 . 2 k
—
GND_D
O
—
P
KDL-32EX407/40EX407
6
|
7
|
8
|
9
|
10
|
11
|
*RB9006
2 . 2 k
7
5
3
1
R9007
47
8
6
4
2
Portion7
R9056
47
SySTEM
E8
T27
SYSRSTB
SCL0
E7
T26
SYSWRSTB
SDA0
AD1
E18
SYSXI
SCL1
AD2
D18
SYSXO
SDA1
F17
T25
TEST
GPIO62/SCL2
R26
GPIO63/SDA2
M28
R28
M28
URT0RX
CL9013
L29
R29
L29
URT0TX
CL9014
M27
T29
M27
URT1RX
CL9015
L27
T28
L27
URT1TX
CL9016
L28
R27
L28
GPIO64/URT2TX2
CL9017
R25
GPIO65/URT2RX2
M29
V2
NMI
GPIO24/SCICMDV
V5
GPIO25/SCIRST
E17
T5
GPIO52/PRCG0
GPIO26/SCITRD
F19
M6
GPIO53/PRCG1
GPIO27/SCICLK
U4
GPIO28/SCIOFF
D17
GPIO74
E16
M4
GPIO75
MSCLK/SDDATA1
D16
P1
GPIO76
MSDIR/SDCDI R
E15
P2
GPIO77
MSBS/SDCM D
E20
N1
GPIO78
MSDATA0/SDCLK
N3
MSDATA1/SDDATA0
M3
MSDATA2/SDDATA2
N4
MSDATA3/SDDATA3
47 RB9005
N2
SDDIR
*IC9000
MC-10161F1-420-PN4-A
D+3.3V
POWER3
Y
C9003
0 . 1
16V
12
|
13
|
14
|
15
|
16
|
17
|
D+3.3V
RB9008
RB9009
RB9002
2 . 2 k
2 . 2 k
10k
1
3
5
7
7
5
3
1
2
4
6
8
2
4
6
8
RB9010
10k
1
3
5
7
1
3
5
7
2
4
6
8
8
6
4
2
RB9012
47
RB9007
47
68 R9025
47
RB9014
R9027
10k
GND_D
BAL 1/18
E3TL-2 SYSTEM
18
|
19
|
20
|
21
|
22
|
23
CL9002
M_SCL0
CL9004
M_SDA0
CL9007
M_SCL1
CL9008
M_SDA1
CL9009
M_SCL2
CL9010
M_SDA2
M_UART0_RX
M_UART0_TX
CL9011
M_UART1_RX
CL9012
M_UART1_TX
47
RB9011
M_UART2_RX
M_UART2_TX
M_MS_CLK
M_MS_BS
M_MS_DATA0
DOWNLOAD_DATA
DOWNLOAD_CLK
DOWNLOAD_CS
A-1761-160-A <AZ1L> BAL-P1
KDL-32EX407/40EX407
|
9
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