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PDSBA-Q+/PDSBA+/PDSBA/PDSBE User's Manual
CPU Front Side Bus Speed
JFSB1 and JFSB2 allow you to set the
Front Side Bus Frequency. See the table
on the right for pin defi nitions. (Default
is Auto.)
PCI/PCI-E Slots to SMB Speeds
2
2
Jumpers JI
C1/JI
C2 allow you to con-
nect PCI/PCI-Exp. slots to the System
.
Management Bus
The default setting is
open to disable the connection. See the
table on the right for jumper settings.
JPWAKE
KB/MS
4-PinPWR
Processor
A
USB3/4/5/6
Intel
USB1/2
North Bridge
LAN
Clock
Slot7
PCI-E x1
LAN
Slot6
PCI-E x16
CTRL
F W H
Slot5
PCI-E x4
B
2
JI
C1
2
JI
C2
Slot4
PCI-33MHz
HDA
Slot3
PCI-33MHz
CD1
Buzzer
Slot2
PCI-33MHz
COM2
J12
Slot1
PCI-33MHz
JFSB2
1-2
2-3
Open
2-3
Jumper Setting
Closed
Open
J B T 1
Battery
J P 3
Intel
J W D
JLED
South Bridge
I - S A T A 1
I - S A T A 5
I - S A T A 4
I - S A T A 0
J45
J44
LE1
USB9/10
USB7/8
I T E
RAIDLED
IDE#1
JL1
IDE#2
WOL
2-20
CPU FSB Jumper Settings
Jumper Settings
JFSB1
Frequency
1-2
*Auto
2-3
266MHz
2-3
200MHz
Open
133MHz
SMBus to PCI-X/PCI-Exp Slots
Jumper Settings
Defi nition
Enabled
Disabled (*Default)
A. FSB CPU Speeds
B. PCI slots to SMB
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