Hitachi P50H401/DW3-U Service Manual page 125

TROUBLESHOOTING THE 50AE1 PANEL
3.2 Block Diagram
3.2.1 Signal Diagrams
Y-SUS B.
Y-SUS
EVEN SW
Y-SCAN
EVEN SW
Y-SUS
ODD SW
Y-SCAN
ODD SW
SESW
OSC
24MHz
SIGNAL
CN1
INPUT
LVDS
2
I C
Analog Sw
OSC
10MHz
S
D
R
U
S
D
R
D
ADM1 ADM2 ADM3 ADM4
ABUSL
CN51
CN31
CN5
SCAN CONTROLLER
DATA PROCESSOR
RGB
γ comp.
GAIN
.
V-SYNC cont
SCI.
Failure DET.
FLASH MEMORY
1: Power Supply(jig)
※
ADM6 ADM7 ADM8 ADM9 ADM10
ADM5
ABUSR
ABUSC
CN41
CN41
CN3
CN2
CN4
TIMMING ROM
DATA CONVERTER
DITHER
SUB FIELD
/ERR
PRC.
MPU
OSC
EEPROM
.
APC cont
D/A
I/O
CN6
CN4
PFCgo
Vsago
Vcego
123
X
B
X-SUS B.
U
S
X-SUS
U
EVEN SW
X-SCAN
EVEN SW
X-SUS
X
ODD SW
B
U
X-SCAN
S
ODD SW
D
POS
CN21
ABUSL B
RESET SW
CN51
LOGIC B.
MEMORY
CONTROLLER
FRAME
OSC
MEMORY
Vrs
Vra
Vrw
Vrx
PSU B.
*1
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