Block Diagram （ブロックダイアグラム - Yamaha MODX6 Service Manual

H
■ BLOCK DIAGRAM（ブロックダイアグラム）(MODX6/MODX7)
1
CB100 (5P)
PB MW
CB101 (4P)
USB
MASTER
MONITOR
VOLUME
LEVEL
VR111
SW&LED
CB109 (6P)
VR109
GAIN
SW&LED
CB110 (6P)
VR110
PNL1
SW122
D211
(PN 3/4)
PNL2 VR100,102,104,106
CB111 (10P)
(PN 4/4)
SW&LED
Keyboard unit
SW123–130
2
D213–216
61key、76key：16N+weight
D221–224
DM
+3.3D
Q002
PIO_3.3V
to CPU VDDSHV1,2,3,5,6 etc
VAUX2
Q001
+3.3D
+5D
IC002 (5P)
Reset
TPS65910A3A1 Vdet=4.2V
PMIC +3.3D
IC005 (48P) IC003 (5P)
Reset
PWRHOLD
Vdet=2.9V
I2C
3
+5D NRESPWRON
VDD1 PMIC_PONRST
VDD_MPU
(DCDC) to CPU VDD_MPU
VDD2 VDD_CORE
debug only
(DCDC) to CPU VDD_CORE
VIO VDDS_DDR
(DCDC) to CPU VDDS_DDR and DDR3 SDRAM
VDIG2 VDIG2
(Regulator) to CPU VDDS_PLLx/SRAMx/OSC/RTC
VAUX1 VDDA_1.8V_USB
(Regulator) to CPU VDDA1P8V_USBx
VAUX2
VAUX2
(Regulator)
VAUX33 VDDA_3.3V_USB
+3.3D
(Regulator) to CPU VDDA3P3V_USBx
VMMC
VMMC
SDR
to CPU VDDSHV4
(Regulator)
and eMMC
SDRAM
S1CLK:
128Mbit 95.9616MHz
VPLL VDDA_ADC
4
(Regulator) to CPU VDDA_ADC
(16MB)
IC803 (54P)
VDAC VDAC
(Regulator) to CPU VDDS +3.3D
S2CLK:
95.9616MHz
IC009 (17P) SDR
SDRAM
DCDC +3.3D
128Mbit
(16MB)
IC507 (5P)
+1.5P
Regulator IC804 (54P) /SWP_RES
IC606 (6P)
+1.0M
Regulator
Regulator +1.0S
No Mount
+3.3D
+12V
IC010 (8P)
NAND
DCDC +5D
Flash
8Gbit
(1GB)
2pcs
5
IC604 (48P)
IC607 (48P)
6
28CA1-2001186453
1
G F
+3.3PN
Touch Panel
debug only
INITX
SW103–121 port
(self)
D145–150
D151–155 IC101 (100P)
D165–167 MB9AF141NA
D177,179–208
Sub CPU
D301 LCD
internal clock:40MHz
7inch TFT WVGA
ADC I2C
+5D VR101,103,105,107,108
PNC
IC100 (5P)
+3.3PN
Regulator (PN 1/4)
CB104 (8P)
CB502 (8P) CB602 (4P)
+5D
KEY-IF TPBZ
IC601,602 (5P)
IC501 (44P) (JK 2/4) (JK 3/4)
IC603 (14P)
E-GKS Q601
/E-IC
Buzzer
/RES
Circuit
CB501 (7P) CB601 (7P)
CB504 (7P) CB101 (7P)
VDDS_DDR
DDR3
SDRAM
2Gbit
Bus clock:
(256MB) 400MHz x16
EMIF ADC LCD ctrl
IC401
VMMC
VMMC
SYS_RESETN
nRESETIN_OUT
eMMC
IC402 (5P)
32Gbit
Data clock:
x4
SDR 48MHz
(4GB)
MMC0
IC403
AM3352BZCZ80
CPU
IC001
I2C0 CPU clock:800MHz
VDIG2
PORZ
IC006 (5P)
+3.3D
Audio format:I2S
AD[15-0] Bus clock:100MHz
GPMC McASP0 GPIO
RDN
IC201 (100P)
WRN
EPM240T100
IC214 (20P)
CPLD
BUFF_/OE IC213 (20P) IC214 (20P) IC202 (20P)
/WAIT
/RES
/CPLD_RES
Data BUS,etc
Address BUS,etc
+3.3D +1.0S
+3.3D +1.0M
External CPU BUS
x16 External CPU BUS
x16
S1CLK:
ABUS ABUS
95.9616MHz
CPU_SDO
ADC_SDO
IC900
IC800 P_SDO[4]
x16
SWP70 SWP70
M_SDO[7-4,1,0]
TG Master M_SYSCLK[1,0] TG Slave
M_BCLK
Clock Master
M_WCLK[1,0]
M_SYSCLK1,0=11.2896MHz
REFCLK
/SWP_RES
/IC
/IC
D[15-8] E-bus
Wave ROM Wave RAM E-bus Serial audio I/F
+3.3D +3.3D
NAND
/LAN_CTRL_RES
SDR
Flash
IC508 (5P)
BUFF_/OE
SDRAM
8Gbit
Reset
256Mbit PMIC_PONRST /CPLD_RES
(1GB)
Vdet=2.7V
(32MB)
/PROM_RES
2pcs
/SWP_RES
IC901 (54P)
IC501 (14P)
IC601 (48P)
IC605 (48P)
WARNING
Components having special characteristics are marked
replaced with parts having specification equal to those originally installed.
Z
印の部品は、安全を維持するために重要な部品です。
交換する場合は、安全のために必ず指定の部品をご使用ください。
E
SW&LED
SW132–140
SW142–148
SW150
D239,241–244
D251–253,255
Encoder
SW131
PNR
(PN 2/4)
Keyboard unit
CB102 (50P)
+5D
(HighSpeed)
USB_ENB
USB1_OCN
24MHz
boot config port
XL401
(HighSpeed)
USB1 Host ctrl
25MHz
debug only No Mount
PIO_3.3V XL201
IC206 (32P)
Ethernet LAN8710A
MII
PHY
/RST /LAN_CTRL_RES
UART1
Debug UART0
IC210 (20P)
debug only
JTAG I/F
pin header 6pin
/ADDA-PDN_
MIDI-/IC
M_SYSCLK[0]
M_BCLK
+3.3D +3.3D +1.5P M_WCLK[0]
ADC_SDO
External CPU BUS
SDR
SDRAM
128Mbit
/PROM_RES /ADDA-PDN_
x16
(16MB) XL503 MIDI-/IC
IC700 +3.3D
IC805 (54P) DAC_MUTE
SSP2
M_SYSCLK[0]
/RES
USB Audio I/F
M_BCLK
NOR
M_WCLK[0]
Flash
M_SDO[1]
XL501
x16 16Mbit
(2MB)
Serial audio I/F IC502 (48P)
/IC
+9A
RC
debug only
filter JTAG I/F
No Mount
/PROM_RES
Z and must be
■ BLOCK DIAGRAM（ブロックダイアグラム）(MODX6/MODX7)
3
D C
MODX6
KEY-IF
(JK 2/4)
CB504 (7P) CB505 (5P) CB503 (12P)
CN5 (7P) CN2 (5P) CN1 (12P)
C1 – B3 C4 – C6
61L 61H
Keyboard unit
USB TO DEVICE
IC405 (5P)
USB
JK301
High side SW
USB TO HOST
JK501
CB401 (5P)
JK
(JK 1/4)
ETHERNET
CB201 (6P)
KLU1T041
A-Y LF
SUS_INS
FSW
+3.3D
JK402
CB205 (4P) CB102 (4P)
JK401
+12V
ADINL_INS
ADINR_INS
MIC/LINEN
+9A +9A
+3.3D +5A
PDN
ADC
IC201,202 (8P)
Audio
format:
I2S
IC904 (16P)
+3.3D
+5A IC203,204 (8P)
+9A
Q301
Tr
PDN
DAC
Audio
IC905 (8P)
format:
I2S
Q302
IC902 (28P) Tr
+9A
IC301,302 (8P)
/STBY
+9A
IC903 (3P)
Q303,305
Tr
Regulator +5A
Tr
Q304,306
IC303 (8P)
+12V
Mute Circuit
Q104–109
/CPU_MUTE
+12V
IC101 (3P)
Regulator +9A
CB201 (6P)
Q101–103
Power SW
+12V
Circuit
CB301 (6P)
/STBY
SW101
CB101 (4P)
CB701 (4P)
DCIN
!
(JK 4/4) TH701
JK701
B A
MODX6/MODX7
MODX7
KEY-IF
(JK 2/4)
CB503 (12P) CB507 (6P) CB508 (8P)
CN4 (12P) CN5 (6P) CN1 (8P)
E0 – C3 C#3 – G6
76L 76H
FOOT CONTROLLER
1
JK403
2
JK404
FOOT SWITCH
SUSTAIN
JK405
ASSIGNABLE
JK406
MIDI IN
MIDI OUT
A/D INPUT
L/MONO
JK201
R
JK202
OUTPUT
L/MONO
JK301
R
JK302
PHONES
JK303
!
12V
+ -
AC Adaptor
PA-150
series
!
1
2
3
4
5
6