To verify that the chip select line of a memory chip is strobed after the address is stable
To verify that the chip select line of a memory chip is
strobed after the address is stable
Select the timing analyzer Trigger menu.
1
Define a term called ADDRESS to represent the address in question
2
and the Edge1 term to represent the asserting transition on the chip
select line.
You can rename the Edge1 term to suit the problem, for example, to
MEM_SEL.
Under Timing Sequence Levels, enter the following sequence
3
specification:
•
Find "ADDRESS" > 80 ns
•
TRIGGER on "MEM_SEL" 1 time Else on "≠ ADDRESS" go to level 1
Verifying Setup Time for Memory Address
Triggering
1–15