M29W040B; Description - Hitachi 42PD3200A Service Manual

31 52 41
32 51 -
33 50 40
34 49 39
35 48 -
36 47 38
37 46 37
38 45 -
39 44 -
40 43 -
41 - -
42 42 36
43 41 35
- - -
- - -
- - -
44 40 34
45 39 33
46 38 32
47 37 31
48 36 30
49 35 29
50 34 28
51 33 27
52 - -
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55 30 -
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57 28 24
58 27 23
59 26 22
60 25 21
- - -
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63 22 -
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65 20 18
66 19 17
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67 18 16
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68 17 15

12.16. M29W040B

12.16.1. Description

The M29W040B is a 4Mbit (512Kb x8) non-volatile memory that can be read, erased and
reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On
power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or
EPROM. The M29W040B is fully backward compatible with the M29W040.The memory is divided into
blocks that can be erased independently so it is possible to preserve valid data while old data is erased.
Each block can be protected independently to prevent accidental Program or Erase commands from
modifying the memory. Program and Erase commands are writ-ten to the Command Interface of the
memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the
memory by taking care of all of the special operations that are required to update the memory contents.
The end of a program or erase operation can be detected and any error conditions identified. The
command set required to control the memory is consistent with JEDEC standards. Chip Enable, Output
Enable and Write Enable signals control the bus operation of the memory. They allow simple
connection to most microprocessors, often without additional logic.
56 44 SC1_IN_L
55 43 ASG1
54 42 SC2_IN_R
53 41 SC2_IN_L
52 40 ASG2
51 39 SC3_IN_R
50 38 SC3_IN_L
49 37 ASG4
48 36 SC4_IN_R
47 35 SC4_IN_L
46 - NC
45 34 AGNDC
44 33 AHVSS
43 - AHVSS
42 - NC
41 - NC
40 32 CAPL_M
39 31 AHVSUP
38 30 CAPL_A
37 29 SC1_OUT_L
36 28 SC1_OUT_R
35 27 VREF1
34 26 SC2_OUT_L
33 25 SC2_OUT_R
32 - NC
31 24 NC
30 23 DACM_SUB
29 22 NC
28 21 DACM_L
27 20 DACM_R
26 19 VREF2
25 18 DACA_L
24 17 DACA_R
23 - NC
22 - NC
21 16 RESETQ
20 15 NC
19 14 NC
18 13 NC
17 12 I2S_DA_IN2
16 11 DVSS
15 - DVSS
14 - DVSS
13 10 DVSUP
12 - DVSUP
11 - DVSUP
10 9 ADR_CL
IN LV
AHVSS
IN LV
IN LV
AHVSS
IN LV
IN LV
AHVSS
IN LV
IN LV
LV or AHVSS
OBL
OBL
OBL
LV
LV
OBL
OBL
OBL
OUT LV
OUT LV
OBL
OUT LV
OUT LV
LV
LV
OUT LV
LV
OUT LV
OUT LV
OBL
OUT LV
OUT LV
LV
LV
IN OBL
LV
LV
LV
IN LV
OBL
OBL
OBL
OBL
OBL
OBL
OUT LV
22
SCART 1 input, left
Analog Shield Ground 1
SCART 2 input, right
SCART 2 input, left
Analog Shield Ground 2
SCART 3 input, right
SCART 3 input, left
Analog Shield Ground 4
SCART 4 input, right
SCART 4 input, left
Not connected
Analog reference voltage
Analog ground
Analog ground
Not connected
Not connected
Volume capacitor MAIN
Analog power supply 8V
Volume capacitor AUX
SCART output 1, left
SCART output 1, right
Reference ground 1
SCART output 2, left
SCART output 2, right
Not connected
Not connected
Subwoofer output
Not connected
Loudspeaker out, left
Loudspeaker out, right
Reference ground 2
Headphone out, left
Headphone out, right
Not connected
Not connected
Power-on-reset
Not connected
Not connected
Not connected
2
I S2-data input
Digital ground
Digital ground
Digital ground
Digital power supply 5V
Digital power supply 5V
Digital power supply 5V
ADR clock