Pin Configuration - LG StudioWorks E700B Service Manual

BLOCK DIAGRAM
X
IN
X
OUT
PWM0
PWM6
Vsync-I
Hsync-I
Csync-I
Vsync-O
Hsync-O
Clamp-O
TM0CAP
*S3C8639
- 32Kbyte ROM
- 784 Byte RAM
*S3C863A
- 48 Kbyte ROM
- 1040 Byte RAM

PIN CONFIGURATION

P0.0/INT0 1
P0.1/INT1 2
P0.2/INT2 3
P0.3 4
P0.4/TM0CAP 5
P0.5 6
P0.6 7
P0.7 8
P1.0/SDA1 9
P1.1/SCL1 10
V 11
DD1
V 12
SS1
X 13
OUT
X 14
IN
TEST (GND) 15
SDA0 16
SCL0 17
RESET 18
P1.2 19
P2.0/PWM0 20
P2.1/PWM1 21
P0.0-P0.7/INT0-INT2
RESET
Port 0
INT0-INT2
Main
Osc
I/O Port and Interrupt
8-Bit
PWM
(7-Ch)
Sync
Processor
32/48*
Kbyte
8-Bit
ROM
Counter
(Tmer M0)
12-Bit
Counter
(Timer M1)
S3P863A
42 P3.7
41 P3.6
40 P3.5
39 P3.4
38 P3.3/AD3
37 P3.2/AD2
36 P3.1/AD1
35 P3.0/AD0
34 V
DD2
S3C8639
33 V
SS2
32 P2.7/Csync-I (SOG)
/C863A
31 Hsync-I
(42-SDIP)
30 Vsync-I
29 Vsync-O
28 Hsync-O
27 Clamp-O
26 P2.6/PWM6
25 P2.5/PWM5
24 P2.4/PWM4
23 P2.3/PWM3
22 P2.2PWM2
P2.0-P2.7
Port 2
Control
SAM8 CPU
784/1040-
Byte
Register File
Interval
Multi-master IIC-Bus
Timer
and DDC1/2B/2Bi/2B+
(Timer M2)
SCL0
- 30 -
V , V
DD1 DD2
V , V
SS1 SS2
TEST
Port 1
P1.0-P1.2
Port 3
P3.0-P3.7
ADC
AD0-AD3
Stave SCL1
Only
IIC-Bus
SDA1
SDA0