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10-3 FLI_Deinterlacer Part Schematic Diagram
D_DATA(31:0)
R300
R301
10K
10K
1/16W
1/16W
3-1
+3.3V
1
VDD33
2
VSS
R302
22
3
VHS1
HSYNCREFI
R303
22
4
VVS1
VSYNCREFI
R304
22
5
FIELDIN
6
FIELD_AV
B/CbIN0
7
B/CbIN1
UV(0)
8
B/CbIN2
UV(1)
9
B/CbIN3
UV(2)
10
B/CbIN4
UV(3)
11
B/CbIN5
UV(4)
12
( CCIR601 INPUT )
B/CbIN6
UV(5)
13
B/CbIN7
UV(6)
14
B/CbIN8
UV(7)
15
B/CbIN9
16
VDD25
17
VSS
18
G/YIN0
19
G/YIN1
Y(0)
20
G/YIN2
Y(1)
21
G/YIN3
Y(2)
22
G/YIN4
Y(3)
23
G/YIN5
Y(4)
24
G/YIN6
Y(5)
25
G/YIN7
Y(6)
26
G/YIN8
Y(7)
27
G/YIN9
28
R/CrIN0
29
R/CrIN1
30
R/CrIN2
31
R/CrIN3
32
R/CrIN4
33
VDD33
34
VSS
35
R/CrIN5
36
R/CrIN6
37
R/CrIN7
38
+2.5V_FLI
R/CrIN8
39
R/CrIN9
40
PIXCLK
C300
LLC1
C301
BD300
41
R305
22
TEST4
10uF
100nF
42
AVDD
B
43
AVSS
HB-1M2012-800JT
44
I2CADDR1
R306
0
R307
0
(I2C ADDRESS : C0/C1 )
R308
22
SDA_AV
R309
22
SCL_AV
R310
22
RESET_FLI
+3.3V
R311
R312
R313
R314
R315
R316
R317
R318
PLEASE START WITH THIS LOCATION
WHEN YOU HAVE A CHANCE TO CORRECT SCHEMATIC
AFTER CORRECTING IT !!!!!!!
THEN , PLEASE UPDATE LOCATION NUMBER
R337
C334
BD301
CA304
RA304
IC303
ES15A*/ES17A*
132
VSS
131
ADDR4
130
ADDR5
129
ADDR6
128
ADDR7
127
ADDR8
126
ADDR9
125
ADDR10
124
VSS
123
VDD33
122
BSEL
121
CASN
120
RASN
119
WEN
118
MEMCLKO
117
YCLKO
116
CCLKO
115
VSS
114
VDD33
IC300
113
TESTO0
112
TESTO1
111
FLI2200
TEST0
110
FILM
109
TEST1
108
FSYNC
107
VDD25
106
VSS
105
VDD33
104
B/CbOUT0
103
B/CbOUT1
102
B/CbOUT2
101
B/CbOUT3
100
B/CbOUT4
99
B/CbOUT5
98
B/CbOUT6
97
B/CbOUT7
96
VSS
95
VDD33
94
B/CbOUT8
93
B/CbOUT9
92
H/CSYNCO
91
VSYNC/CREFO
90
HREFO
89
VREFO
7
5
3
1
7
5
3
1
( 22 OHM x 4 )
8
6
4
2
8
6
4
2
J2PC(0:15)
J2PC(15)
0
J2PC(14)
10K
J2PC(13)
0
J2PC(12)
0
J2PC(11)
0
J2PC(10)
0
J2PC(9)
10K
J2PC(8)
0
2
4
6
8
2
4
6
8
CA300
CA301
1
1
3
5
7
3
5
7
D_ADDR(10:0)
(IFORMAT(2:0) = (110) = Y/Cb/Cr(D1, with embedded timing )
(OFORMAT(2:0) = (010) = Y Cb/Cr + Y CbCr (double rate D1, with external/separate syncs )
D_ADDR(4)
D_ADDR(5)
D_ADDR(6)
D_ADDR(7)
D_ADDR(8)
D_ADDR(9)
D_ADDR(10)
R325
22
FLI_BA
R326
22
FLI_CAS
R327
22
FLI_RAS
R328
22
FLI_WEN
R329
22
FLI_MCLK
R330
22
J2PC_VCLK
R331
22
( 27M )
J2PC(0)
J2PC(1)
J2PC(2)
J2PC(3)
R334
0
J2PC(4)
J2PC(5)
R335
0
J2PC(6)
J2PC(7)
2
4
6
8
2
4
6
8
J2PC(0:15)
J2PC(0)
1
1
CA302
3
5
7
3
5
7
RA302
CA303
J2PC(1)
22
J2PC(2)
J2PC(3)
J2PC(4)
RA303
J2PC(5)
22
J2PC(6)
J2PC(7)
R319
22
J2PC_VHS
R320
22
J2PC_VVS
R321
22
J2PC_HREF
R322
22
J2PC_VREF
+2.5V_FLI
+2.5V_FLI
+5V_D
IC301
LM317SX
C304
100nF
1
2
VIN
VOUT_1
ADJ
VOUT_2
C305
3
4
R324
10uF
470
C302
C303
100nF
10uF
C306
100nF
(CCIR601 OUTPUT )
R323
470
+3.3V
C311
C312
C313
C314
C315
C316
C317
C318
100nF
100nF
100nF
100nF
100nF
100nF
100nF
C310
10uF
16V
+3.3V
D_DATA(0:31)
D_DATA(0)
D_DATA(1)
D_DATA(2)
D_DATA(3)
D_DATA(4)
D_DATA(5)
D_DATA(6)
D_DATA(7)
+3.3V
FLI_WEN
FLI_CAS
TP100
FLI_RAS
FLI_BA
R332
D_ADDR(10)
10K
D_ADDR(0)
1/16W
D_ADDR(1)
D_ADDR(2)
D_DATA(16)
D_DATA(17)
D_DATA(18)
D_DATA(19)
D_DATA(20)
D_DATA(21)
D_DATA(22)
D_DATA(23)
D_ADDR(0:10)
C307
C308
C309
100nF
10nF
10nF
C319
C320
C321
C322
C323
10nF
10nF
10nF
10nF
10nF
10nF
10 Schematic Diagrams
C324
C325
C326
C327
C328
C329
C330
C331
C332
C333
100nF
100nF
100nF
100nF
100nF
10nF
10nF
10nF
10nF
10nF
IC302
K4S643232C-TC70
86
1
VDD1
VSS4
85
D_DATA(15)
2
DQ0
DQ15
84
3
VDDQ1
VSSQ8
83
D_DATA(14)
4
+3.3V
DQ1
DQ14
82
D_DATA(13)
5
DQ2
DQ13
81
6
VSSQ1
VDDQ8
80
7
D_DATA(12)
DQ3
DQ12
79
8
D_DATA(11)
DQ4
DQ11
78
9
VDDQ2
VSSQ7
77
R333
10
D_DATA(10)
DQ5
DQ10
76
10K
11
D_DATA(9)
DQ6
DQ9
75
1/16W
12
VSSQ2
VDDQ7
74
13
D_DATA(8)
DQ7
DQ8
73
14
N_C1
N_C7
72
15
VDD2
VSS3
71
16
DQMO
DQM1
70
17
WE_
N_C6
69
18
CAS_
N_C5
68
19
FLI_MCLK
RAS_
CLK
67
20
CS_
CKE
66
21
D_ADDR(9)
N_C2
A9
65
22
D_ADDR(8)
BA0
A8
64
D_ADDR(7)
23
BA1
A7
24
63
D_ADDR(6)
A10
A6
62
D_ADDR(5)
25
A0
A5
61
D_ADDR(4)
26
A1
A4
60
27
D_ADDR(3)
A2
A3
59
28
DQM2
DQM3
58
29
VDD3
VSS2
57
30
N_C3
N_C4
56
D_DATA(31)
31
DQ16
DQ31
55
32
VSSQ3
VDDQ6
54
33
D_DATA(30)
DQ17
DQ30
53
34
D_DATA(29)
DQ18
DQ29
52
35
VDDQ3
VSSQ6
51
36
D_DATA(28)
DQ19
DQ28
50
37
D_DATA(27)
DQ20
DQ27
49
38
VSSQ4
VDDQ5
48
39
D_DATA(26)
DQ21
DQ26
47
40
D_DATA(25)
DQ22
DQ25
46
41
VDDQ4
VSSQ5
45
42
D_DATA(24)
DQ23
DQ24
44
43
VDD4
VSS1
10-5
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