Qorvo ACT41000-104-REF01 User Manual

USER'S GUIDE UG146
ACT41000-104-REF01 User's Guide
Description
ACT41000-104-REF01 reference design provides both the drain and gate voltages for many of Qorvo's RF PAs. It automatically
searches for and optimizes the optimal RF PA gate voltage to set the required Idq bias current. This reference design demonstrates
how Qorvo's ACT41000 simplifies RF PA system level design and cost. The design is specifically configured for the QPA2211, but it
can be easily modified for many other RF PAs.
This document describes the characteristics and operation of the Qorvo ACT41000EVK-104-REF01 reference design. It provides setup
and operation instructions, schematic, layout, BOM, GUI, and test data. The design demonstrates the ACT41000QI104-T (22V) power
management IC. Other ACT41000QIxxx options can be evaluated on this EVK by replacing the IC and any other necessary
components. The initial design is optimized for the QPA2211.
Functions
The design accepts an input voltage range up to 40V. The minimum input voltage is dependent on the drain voltage being tested. With
the QPA2211 22V drain voltage, the design works down to 24V. The ACT41000 converts the input voltage to the high-power RF PA
nd
drain voltage of 22V at up to 4A. Typical RF PA drain voltages are the range of 20V to 24V. The design also includes a 2 on-board
power supply to generate the negative RF gate voltage. Input power for the gate voltage supply comes from the ACT41000 auxiliary 5V
bias output.
To fully utilize the reference design features, the user must connect the reference design to a PC to use the graphical user interface
(GUI) software. The GUI allows the user to program the exact voltage and current for the specific RF PA being tested. The user can
use GUI to set the Idq bias current requirement and the design autonomously finds and stores the optimal gate voltage for the Idq bias
current. After the optimal gate bias voltage is found, the user can then apply an RF signal to test the RF PA functionality. The GUI gives
the user full control over the drain voltage, the drain current limit, and the gate voltage. The overall system design consists of two
separate PCBs, the ACT41000-104-REF01 board and an RF PA EVK, that the user must manually wire together.
Figure 1. Reference Design Picture
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March 2022 Rev 1.0 | Subject to change without notice 1 of 22