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SAWless with ATV mode
DTOS40CVH033A
2
I
C
IF_AGC
IF_AGC
Figure 7-4 Front-End analogue block diagram
7.5
HDMI
Refer to figure
7-5 HDMI input configuration
RTD2644DD
I2C
ARX
CN501
HDMI 1
Figure 7-5 HDMI input configuration
The HDMI connector has the following specifications:
•
+5V detection mechanism
•
Stable clock detection mechanism
•
Integrated EDID
•
HPD control
•
Sync detection
•
TMDS output control
•
MHL Support
7.6
Video and Audio Processing - RTD2644DD
The RTD2644DD is the main audio and video processor (or
System-on-Chip) for this platform. It has the following features:
•
MIPS CPU for system control
•
supports multi-standard TV broadcasting includes BTSC,
EIA-J and FM A2
•
Support NTSC-M,NTSC-443, PAL(B,D,G,H,I) PAL-M,
PAL- N, PAL-CN, SECAM
•
Embedded DTMB/DVB-C demondulator
•
Automatic Video Error Concealment
•
Loe power MCU available for standby mode control
•
Support local dimming for direct/edge backlight LED panel
•
One MHL 2.0 compliant port
•
Multiple HDMI 1.4 compliant ports with ARC support
The RTD2644DD combines front-end video processing
functions, such as NTSC/PAL/SECAM Video Decoder,
MPEG-2/H.264 decode, analog video decode and HDMI
reception, with advanced back-end video picture
improvements. It also includes next generation Motion
Accurate Picture Processong. High flat panel screen
resolutions and refresh rates are supported with formats
I
2
C
IF
RTD2644DD
19720_203.eps
for the application.
I2C
BRX
CN502
HDMI 2
19720_204.eps
Circuit Descriptions
including 1280 × 720 @ 60Hz and 1920 × 1080 @ 60Hz. The
RTD2644DD combination of Ethernet, supports new TV
experiences with IPTV.
For a functional diagram of the RTD2644DD, refer
to
Figure
8-1.
back to
div.table
TPR14.1A LA
7.
EN 25
2014-Jul-18
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