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Chassis – Common Interface
RADDRESS[0..22]
RADDRESS[0..22]
RESET
RESET
RADDRESS22
RADDRESS22
3V3D_FLASH
TS_DATA[0..7]
TS_DATA[0..7]
From Front End
#TS_SW is inverted TS_SW
!
TS_SW: L-TS from CI; H-TS from Front End
12
3V3D_CI
13
R710
10K
@
From CI Socket
TS_CI_DATA[0..7]
TS_CI_DATA[0..7]
#
GCS0B
CI_IOWR
CI_IORD
CI_RESET
CI_REG
FOEB
FWEB
$
RADDRESS17
IC700
RADDRESS16
1
48
A15
A16
RADDRESS15
2
47
A14
VCCQ
3V3D_FLASH
RADDRESS14
3
46
A13
GND
RADDRESS13
4
45
RDATA15
A12
Q15
RADDRESS12
5
44
RDATA7
A11
Q7
RADDRESS11
6
43
RDATA14
A10
Q14
RADDRESS10
7
42
RDATA6
A9
Q6
RADDRESS9
R701
8
41
RDATA13
A8
Q13
RADDRESS20
9
40
RDATA5
100R
A21
Q5
RADDRESS21
10
39
RDATA12
R702
A20
Q12
FWEB
100R
11
38
RDATA4
WE
Q4
12
37
RESET
VCC
13
36
RDATA11
R703
NC
VPP
Q11
R718
0R
14
35
RDATA3
WP
Q3
RADDRESS20
R705
15
34
RDATA10
A19
Q10
RADDRESS19
16
33
RDATA2
NC
A18
Q2
RADDRESS18
17
32
RDATA9
A17
Q9
RADDRESS8
18
31
RDATA1
A7
Q1
RADDRESS7
19
30
RDATA8
A6
Q8
RADDRESS6
20
29
RDATA0
A5
Q0
RADDRESS5
21
28
FOEB
A4
OE
RADDRESS4
22
27
A3
GND
RADDRESS3
23
26
FCSB0
A2
CE
FCSB0
RADDRESS2
24
25
A1
A0
GND
AT49BV162AT-70TU
RADDRESS1
453230R
3V3D_CI
ID_TS_DATA[0..7]
1
20
DIR
VCC
TS_DATA7
2
19
#TS_SW
A0
OE
to MPEG Decoder Ts Input
TS_DATA6
3
18
ID_TS_DATA7
A1
B0
TS_DATA5
4
17
ID_TS_DATA6
A2
B1
TS_DATA4
5
16
ID_TS_DATA5
A3
B2
TS_DATA3
6
15
ID_TS_DATA4
A4
B3
TS_DATA2
7
14
ID_TS_DATA3
A5
B4
TS_DATA1
8
13
ID_TS_DATA2
A6
B5
TS_DATA0
9
12
ID_TS_DATA1
A7
B6
10
11
ID_TS_DATA0
GND
B7
11
IC704
11
GND
TC74LCX245FT
14
14
IC705
TC74LCX244FT
10
20
GND
GND
VCC
3V3D_CI
TS_CLK
2
18
ID_TS_CLK
1A0
1Y0
TS_START
4
16
ID_TS_SYNC
1A1
1Y1
TS_VALID
6
14
ID_TS_VALID
1A2
1Y2
8
12
1A3
1Y3
TS_CI_CLK
17
3
ID_TS_CLK
2A0
2Y0
TS_CI_SYNC
15
5
ID_TS_SYNC
2A1
2Y1
TS_CI_VALID
13
7
ID_TS_VALID
2A2
2Y2
WAIT#
11
9
GRDYB
2A3
2Y3
#TS_SW
1
19
TS_SW
#TS_SW
OE1
OE2
TS_SW
3V3D_CI
1
20
DIR
VCC
TS_CI_DATA0
2
19
TS_SW
A0
OE
TS_CI_DATA1
3
18
ID_TS_DATA0
A1
B0
TS_CI_DATA2
4
17
ID_TS_DATA1
A2
B1
TS_CI_DATA3
5
16
ID_TS_DATA2
A3
B2
TS_CI_DATA4
6
15
ID_TS_DATA3
A4
B3
TS_CI_DATA5
7
14
ID_TS_DATA4
A5
B4
TS_CI_DATA6
8
13
ID_TS_DATA5
A6
B5
TS_CI_DATA7
9
12
ID_TS_DATA6
A7
B6
10
11
ID_TS_DATA7
GND
B7
IC706
GND
TC74LCX245FT
3V3D_CI
IC707
1
20
DIR
VCC
INPACK#
2
19
EMI_SW
A0
OE
GCS0B
3
18
CI_INPACK
A1
B0
CI_INPACK
CI_IOWR
4
17
CE1#
A2
B1
CI_IORD
5
16
IOWR#
A3
B2
CI_RESET
6
15
IORD#
A4
B3
CI_REG
7
14
CIRESET
A5
B4
FOEB
8
13
REG#
A6
B5
FWEB
9
12
OE#
A7
B6
10
11
WE#
GND
B7
TC74LCX245FT
GND
RADDRESS[0..22]
RDATA[0..15]
RDATA[0..15]
RDATA0
R725
22K
RDATA6
R726
22K
3V3D_FLASH
RDATA8
R727
22K
RDATA15
R728
22K
RDATA14
R729
22K
RDATA13
R730
22K
RDATA12
R731
22K
RDATA7
R732
22K
RDATA11
R704
22K
RDATA10
R706
22k
RDATA9
R733
22K
RDATA5
R734
22K
RDATA4
R735
22K
RDATA3
R736
22K
RDATA2
R707
22K
RDATA1
R708
22K
EMI_SW
GND
STRAP Pin Settings
ID_TS_DATA[0..7]
12
13
SINGLE_PCMCIA_SOCKET
TS_CI_DATA[0..7]
L700
5VD_CI
VCC5V
60R/100Mhz
VCC_CI
GND
R723
10K
PROT2
R724
10K
GND
VCC3.3V_D
EMI BUS Address & Data Bus
RDATA[0..15]
RADDRESS[0..22]
3V3D_CI
R700
10K
GND
GND
IC703
244
244
TC74LCX244FT
EMI_SW
3V3D_CI
C701
100nF
GND
5VD_CI
N.C.
R709
10K
70
SINGLE CI CONNECTOR
GND
69
GND
S700
GND
TS_CI_DATA[0..7]
VCC_CI
VDD12V_A
T700
PMV56XN
3
2
VCC_CI
C705
R713
10K
10uF/10V
T701
2N7002
1
EMI_SW
EMI_SW: L- VCC_CI is ON, H- VCC_CI is OFF
GND
L701
3V3D_FLASH
C706
C707
60R/100Mhz
C708
1uF
100nF
100nF
GND
L702
3V3D_CI
60R/100Mhz
C709
C712
C711
1uF
100nF
100nF
GND
RDATA[0..15]
IC701
TC74LCX244FT
GND
GND
IC702
245
TC74LCX245FT
3V3D_CI
3V3D_CI
C700
C702
100nF
100nF
GND
GND
VCC_CI
C703
1uF
GND
VCC_CI
C704
1uF
R711
R712
GND
10K
10K
N.C.
5VD_CI
From Front End
TS_DATA[0..7]
TS_DATA[0..7]
3V3D_CI
R714
R715
R716
R717
10K
10K
10K
10K
CI_CD1
CI_CD1
CI_CD2
CI_CD2
CI_VS1
CI_VS1
CI_IREQ
CI_IREQ
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