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CI CONTROL BUFFER
+3.3V_MULTI
IC1300
MC74LCX541DTR2G
VCC
20
OE2
19
016:G13;016:AJ2
/CI_CE1
O0
18
O1
016:T13;016:AJ2
/CI_CE2
17
/CI_WE
O2
016:H12
16
O3
/CI_IOWR
15
016:T12
O4
016:G13
/CI_OE
14
O5
/CI_IORD
13
016:T13
O6
12
O7
11
CI_D[0-7]
016:AG22
AR1316
CI_D[3]
33
CI_D[4]
CI_D[5]
CI_D[6]
AR1317
CI_D[7]
33
CI_D[0]
CI_D[1]
CI_D[2]
CI_A[0-14]
47
R1301
/CI_CE1
33
AR1304
CI_A[10]
47
R1302
/CI_OE
CI_A[11]
CI_A[9]
CI_A[8]
CI_A[13]
CI_A[14]
CI_A[12]
47
R1300
/CI_WE
/CI_IREQ
[GP39]
AR1305
007:H5;016:AJ3
33
33
AR1306
CI_A[7]
CI_A[6]
CI_A[5]
CI_A[4]
CI_A[3]
CI_A[2]
CI_A[1]
CI_A[0]
AR1307
33
016:AJ3
[GP41]
/CI_IOIS16
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
DVB-CI SLOT
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
AR1300
10K
CI_A[0]
CI_A[1]
CI_A[2]
CI_A[3]
+3.3V_MULTI
AR1301
10K
CI_A[4]
CI_A[5]
OE1
1
/CI_SEL 007:H5
CI_A[6]
D0
2
EBI_CS
CI_A[7]
D1
007:E7;007:E6;016:AL23
3
AR1302
D2
4
NAND_WE
10K
007:C2;007:E5
CI_A[8]
D3
5
EBI_WE
007:E6
CI_A[9]
D4
6
NAND_RE
007:C3;007:E6
CI_A[10]
D5
007:C2;007:E6
7
NAND_ALE
CI_A[11]
D6
8
D7
9
AR1303
10K
GND
10
CI_A[12]
CI_A[13]
CI_A[14]
+5V_CI_Vs
R1310
100
P1300
10067972-000LF
C1305
0.1uF
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
R1305
R1307
100
C1302
18
52
C1303
0.1uF
0
0.1uF
19
53
READY
20
54
21
55
22
56
23
57
24
58
25
59
R1306
016:AL9
100
26
60
/CI_INPACK
27
61
READY
0
R1308
28
62
29
63
30
64
31
65
32
66
R1304
100
33
67
READY
34
68
G1
69
G2
R1309
100
CI_A[0-14]
007:E7;016:C13
/CI_CD1
007:H6;016:AJ3
AR1312 33
CI_OUTCLK,CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
CI_OUTDATA[4]
CI_OUTDATA[5]
CI_OUTDATA[6]
CI_OUTDATA[7]
/CI_CE2
016:H25;016:AJ2
/CI_VS1
[GP26] 016:AJ3
/CI_IORD
016:H24
/CI_IOWR
016:H25
AR1311
33
007:G6;016:AJ2
CI_MOD_RESET [GP49]
47
R1311
Option For External Demod.
/CI_WAIT 007:E6;016:AJ3
CI_OUTCLK
CI_OUTVALID
FE_TS_DATA[0]
CI_OUTSTART
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
AR1310 33
CI_OUTDATA[0]
AR1313 33
CI_OUTDATA[1]
FE_TS_DATA[4]
CI_OUTDATA[2]
FE_TS_DATA[5]
CI_OUTDATA[3]
FE_TS_DATA[6]
AR1309 33
FE_TS_DATA[7]
/CI_CD2
AR1314
33
[GP38]
007:H5;016:AJ2
AR1315
33
CI POWER ENABLE CONTROL
+5V_CI
0.1uF
16V
C
R1313
10K
B
CI_5V_CTL
007:H7
[GP27]
E
EBI_RW
007:E6
016:F16
CI_D[0-7]
CI_D[0]
CI_D[1]
CI_D[2]
CI_D[3]
CI_D[4]
CI_D[5]
CI_D[6]
CI_D[7]
DVB-CI DETECT
NL17SZ08DFT2G
FE_TS_VAL
IN_B
1
IN_A
FE_TS_ERR
2
READY
GND
3
DVB-CI PULL-DOWN (Near CI Slot)
DVB-CI PULL-UP (Near CI Slot)
FE_TS_DATA[0-7]
/CI_IOIS16
016:I8
/CI_IREQ
007:H5;016:G11
/CI_VS1
016:T13
/CI_WAIT
007:E6;016:S10
007:H5;016:V14
CI_OUTCLK
007:H6;016:S15
/CI_CD1
007:H5;016:S7
/CI_CD2
FE_TS_SYNC
016:G13;016:H26
/CI_CE1
FE_TS_VAL_ERR
/CI_CE2
016:H25;016:T13
007:G6;016:S10
CI_MOD_RESET
FE_TS_DATA_CLK
Q1301
+5V_CI_Vs
RSR025P03
S
D
READY
C1308
G
0.1uF
C1309
22uF
10V
16V
4.7uF
10V
Q1300
2SC3052
+3.3V_MULTI
IC1301
EBI_CS
74LVC245A
007:E7;007:E6;016:K26
DIR
VCC
1
20
NAND_DATA[0-7]
A0
OE
2
19
NAND_DATA[0]
A1
B0
3
18
NAND_DATA[1]
A2
B1
4
17
NAND_DATA[2]
A3
B2
5
16
NAND_DATA[3]
A4
B3
6
15
NAND_DATA[4]
A5
B4
7
14
NAND_DATA[5]
A6
B5
8
13
NAND_DATA[6]
A7
B6
9
12
NAND_DATA[7]
GND
B7
10
11
+3.3V_MULTI
IC1302
VCC
5
READY
C1311
0.1uF
OUT_Y
16V
4
GND
READY
FE_TS_VAL_ERR
R1327
0
R1326
0
/CI_INPACK
016:O9
External Demod.
+5V_CI
10/01
BCM3556-C0
DVB-CI SLOT
5
13
LGE Internal Use Only
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