Block Diagram - Hdmi Re Section - Sony STR-DH700 Service Manual

STR-DH700
5-6. BLOCK DIAGRAM — HDMI RE SECTION —
IC3503
SWITCHER
CN3501
1
A34
DATA2+ 58
3
DATA2- 57 B34
4
DATA1+ 55 A33
6
DATA1- 54 B33
7
A32
DATA0+ 52
HDMI IN1
9
DATA0- 51 B32
10
CLOCK+ 49 A31
12
B31
CLOCK- 48
19
HOT PLUG DET 44 HPD3
13
CEC
CN3502
1
HPD_SINK
DATA2+ 77 A24
3
DATA2- 76
B24
4
DATA1+ 74 A23
6
DATA1- 73 B23
7
71
DATA0+ A22
HDMI IN2
9
DATA0- 70
B22
10
CLOCK+ 68
A21
12
67
CLOCK- B21
19
HOT PLUG DET 62
HPD2
13
CEC
CN3503
1
DATA2+ 15
A14
3
DATA2- 14 B14
4
12
DATA1+ A13
6
DATA1- 11
B13
7
DATA0+ 9
A12
HDMI IN3
9
DATA0- 8 B12
10
CLOCK+
6 A11
12
CLOCK- 5 SCL_SINK 38
B11
19
HOT PLUG DET 80 HPD1
SDA_SINK 39
13
CEC
CN3510
5
232C_IN(VU_RX)
3
232C_OU(VU_TX)
FLASH
PROGRAMMING 2
RESET
1
CNVSS
STR-DH700
Z1 35
Y1 34
Z2 32
Y2 31
Z3 29
Y3 28
Z4 26
Y4 25
IC3519
HDMI CONTROL
S3 23 53 TMDS_S3
S2 22 52 TMDS_S2
S1 21 51 TMDS_S1
40 21
RX_HPD1
xOE 42 54 TMDS_OEB
30 232CIN
29 232COUT
10 RESET
7 CNVSS
11 XOUT
13 XIN
56 55 35 41 33 34
10 9 1
8 5 2Y1
6 4 2Y3
VIN 5
3 2 2Y2
IC3501 IC3504 IC3516
POWER CONTROL
POWER POWER
CONTROL DETECT
IC3521
IC3509
EEPROM DATA SELECT EEPROM
A 10 7 WP
2-COM 3 7 SDA
1-COM 13 7 SCL
14 1Y1
1Y0 12
2Y0 1
5 2Y1
IC3511
HDMI RX
50 RXC-
VSYNC 1
51 RXC+
HSYNC
128
DE 127
54 RX0-
HSYNC 128
55 RX0+
58 RX1-
59 RX1+
QE1-QE23
62 RX2-
63 RX2+
RX_INT 20 91 INT
RX_RST 19 89 RESET
MUTE 65 61 MUTE
CSDA 28 39 CSDA
CSCL 27 40 CSCL
76 75 74 73 72 71 79 70
TX_RST 42
TX_INT 43
22 22
IC3513
HDMI TX
2 VSYNC
TX2+ 36
TX2- 35
1 HSYNC
TX1+ 33
80 DE
TX1- 32
1 HSYNC
TXO+ 30
TXO- 29
TXC+ 27
TXC- 26
D1- D23
IC3533
HPD DETECTION
HPD 33
7 1Y
DSDA 19
Q3504
DATA
BUFFER
DSCL 20
42 RESET
17
INT
43 44 12 11 10 9 8 7 6 5
IC3526
+4V REG
VCC 2
8 7 3 4 5 6 9 2
CTL 1
IC3532
AUDIO BUFFER
18 17 16 15 14 13 12 11
IC3528
+4V REG
CTL 1
VCC 2
CN3504
1
DATA2+
3
DATA2-
4
DATA1+
6
DATA1-
7
DATA0+
9
DATA0-
10
HDMI OUT
CLOCK+
12
CLOCK-
19
HOT PLUG DET
1B 2
13
CEC
CN3509
K
1,2
+4V
STANDBY SECTION
(Page 23)
CN3511
15
MCK
13
BCK
12
LRCK
11
SD3
10
SD2
9
SD1
8
SD0
7
SPDIF
6
MUTE
B
4
MAINCPU_UA RT_TX
DIGITAL SECTION
3 (1/2)
MAINCPU_UA RT_RX (Page 18)
3
REG_CTL
2
H_RESET
1
CEC