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50
configuration.
5. Do not mix UDIMMs with RDIMMs.
Sparing mode (only supported on Intel Xeon
Processor 5600 Series CPUs )
•
In this mode, if the system detects degrading memory and did not
crash, the data in the failed channel will be copied to the spare
channel. The failed channel is then isolated and the spare channel
becomes active. However, any uncorrectable error that happens
before the isolation will still cause the system to stop normal
operation.
•
Channel 3 is the spare channel. Therefore, the effective size will be
reduced by one-third.
•
Follow the population rules described in the independent mode.
•
Sparing mode requires that all three channels use identical DIMMs.
1A, 2A and 3A should be the same type, size and manufacturer,
likewise for 1B, 2B and 3B. The same rule applies to processor 2.
•
Intel® Xeon® Processor 5500 Series CPUs do NOT support the
memory sparing mode.
Memory population for sparing mode
Single processor configuration
Single processor
Processor 1 P1DIMM slots
Channel 1
Configuration
1B
1A
A
X
B
X
X
Dual processor configuration
Processor 1 P1DIMM slots
Channel 1
Configuration
1B
1A
A
X
B
X
C
X
X
D
X
X
Channel 2
Channel 3
2B
2A
3B
3A
X
X
X
X
X
X
Dual processors
Channel 2
Channel 3
Channel 1
2B
2A
3B
3A
1B
X
X
X
X
X
X
X
X
X
X
X
X
X
3 System upgrades
Processor 2 P2DIMM slots
Channel 2
Channel 3
1A
2B
2A
3B
3A
X
X
X
X
X
X
X
X
X
X
X
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Troubleshooting
