Asus AAEON GENE-APL6 User Manual page 14

A.1 Watchdog Timer Registers .................................................................................. 97
A.2 Watchdog Sample Program ................................................................................ 98
Appendix B - I/O Information ..............................................................................................101
B.1 I/O Address Map ................................................................................................. 102
B.2 Memory Address Map ....................................................................................... 104
B.3 IRQ Mapping Chart ............................................................................................. 105
Appendix C - Mating Connectors ...................................................................................... 109
C.1 List of Mating Connectors and Cables ............................................................. 110
Appendix D - Digital I/O Ports ............................................................................................112
D.1 Digital I/O Register ............................................................................................... 113
D.2 Digital I/O Sample Code (4 in 4 out, 2 low 2 high) ....................................... 115
Preface XIV