Data Communication Between Cpu And Eeprom - Casio 200CR Service Manual

5-6. Data communication between CPU and EEPROM

CPU
Pin No.23 34
32
Pin No.14
Pin No.15
31
30
Pin No.16
EEPROM is a memory to possible write/erase by electricity .
The BR93LC66A privides efficient nonvolatile read/write memory arranged as 64 registers of 16
bits each.
[Block diagram]
Command code
CS
controller
SK
Clock generator
DI
Command
register
DO Dammy bit
EEPROM
1
CS
2
SK
3
BR93LC66A
BR93LC46A
DI
4
DO
Power detection
Write
protection
Address
Address
6 bits
buffer
decorder
Data R/W
16 bits
register amplifier
— 15 —
CS : Chip enable
SK : Serial data clock
DI : Serial data input
DO : Serial data output
High voltage
genarator
6 bits
1024 bit
1024 bits
EEPROM array
16 bits