Panasonic DMR-EH55EC Service Manual page 144

6MHz
91 BIAS
BPF
6MHz
93 CLAMP
LPF
CLAMP/
95
BIAS
97 CLAMP
CLAMP/
99
BIAS
AV1 V
33 CLAMP
AV3 Y
41 CLAMP
AV3 C
45 BIAS
AV3 V
37 CLAMP
AV4 V
35 CLAMP
AV4 Y
39 CLAMP
AV4 C
43 BIAS
(SW10)
BIAS b
AV2 R/C
1 CLAMP a
AV2 G
3 CLAMP
AV2 B
5 CLAMP
AV2 V/Y
31 CLAMP
+
IC3001
VIDEO/AUDIO PROCESSOR
IC-DETAIL BLOCK DIAGRAM
(SW1) (SW2)
6MHz
a a
12MHz b b
c c
(SW3)
a
b
c
d
(SW4)
6MHz
a
12MHz b
c
(SW6)
(SW5)
6MHz a
a b
12MHz b c
c d
(SW7)
a
b
(SW8)
a
b
(SW9)
a
b
SV1
a
b
c
d
e
SV2
a
b
c
d
e
AV1 V
AV3 Y
AV3 C
AV3 V
ADC
AV4 V
OUTPUT
SELECT
AV4 Y
SWITCH
AV4 C
CIRCUIT
AV2 R/C
AV2 V/Y
TUNER V
IIC BUS
LOGIC
CLAMP
COMP
R-Y
OUT
7
AV1
R-C
OUT
9
COMP
B-Y
OUT
11
AV1
B
OUT
12
COMP
Y
OUT
14
DAC Rch
56
15
AV1 DAC Lch
64
G
OUT
17
20
AV4
AV1 Rch
52
Y
OUT
19
AV1 Lch
60
AV2 Rch
AV4
53
C
OUT
AV2 Lch
22 61
AV4
V
OUT
23
24
AV3 Rch
50
AV1
V/Y/C
OUT
26
AV3 Lch
58
AV2
V
OUT
28
C-ADC
AV4 Rch
OUT
51
81
AV4 Lch
V/Y
59
ADC
OUT
83
SLICER
85
SCL
88
SDA
89
TUN Rch
54
TUNER
V TUN Lch
62
30
RF OUT
76 MUTE
60
(SA5R)
AV4
TUN
(SA5L)
AV4
TUN
VC