Sony STR-DH550 Service Manual page 54

STR-DH550/DH750
Pin No. Pin Name
56 POWER_KEY
57 AD_KEY2
58 PUREDIRECT
59 MU UART IN
60 AVCC
61 AVRH
62 AVSS
63 VCOM_SDA (OUT)
64 HDMI_CEC_OUT
65 HDMI_CEC_IN
66 STOP
67 LIMITER
68 DIR FSRATE
69 TEMP_SENSOR_2
70 TEMP_SENSOR_1
71 FLASH_CLK
72 SO
73 SI
74 DIR_SIGNAL
75 VSS
76 VCC
77 DIR_XSTATE
78 TCK
79 TDI
80 TMS
81 TD0
82 DIR_MISO
83 DIR_MOSI
84 DIR _SPICLK
85 DIR_CE
86 DIR_SIGNAL
87 DIR_RST
88 DSP_SFLASH_HOLD
89 DSP_NLPCM
90 DSP_ERROR
91 DSP_SPICS
92 PROG_VU_MD0
93 VU_RST
94 DSP_SPICLK
95 DSP_MOSI
96 DSP_MISO
97 VCC
98 VSEL-SW
99 VMUTE
100 VSS
54
I/O
I Power switch input terminal
I Key signal input (A/D port)
I Disable FL display
I IIC data input from the video micom
- Analog power supply pin for A/D converter
- Standard power supply pin for A/D converter
- Analog ground for A/D converter
O IIC data output to the video micom
O CEC serial data output to the HDMI connector
I CEC serial data input from the HDMI connector
I AC off detection signal input
I Limiter signal input
I Sampling rate frequency from the digital audio interface receiver
I Thermal detection signal input from the thermal sensor
I Thermal detection signal input from the thermal sensor
O In Line programming clock data line
O Serial data output terminal (use for Firmware Flash Program)
I Serial data input terminal (use for Firmware Flash Program)
I Audio serial data input from the digital audio interface receiver
- Ground terminal
- Power supply pin (+3.3V)
I Clock selection signal input from the digital audio interface receiver
- Test clock signal input terminal (for JTAG)
- Test data input terminal (for JTAG)
- Test mode selection signal input terminal (for JTAG)
- Test data output terminal (for JTAG) Not used
I Serial data input from digital audio interface receiver
O Serial data output to digital audio interface receiver
O Serial clock output to digital audio interface receiver
O Chip enable signal output to the digital audio interface receiver
I Audio serial data input from the digital audio interface receiver
O Reset signal output to the digital audio interface receiver
O Hold signal output to the serial fl ash
I SPDIF / IIS NLPCM signal input from digital audio interface receiver / HDMI receiver
I SPDIF / IIS Error signal input from digital audio interface receiver / HDMI receiver
O Chip select signal output to DSP
O Programming (video micom)
O Video micom reset signal output terminal
O Serial data transfer clock signal output to the serial fl ash and DSP
O Serial data output to the serial fl ash and DSP
I Serial data input from the serial fl ash and DSP
- Power supply pin (+3.3V)
O Composite video output signal switch
O Video muting control signal output to the video amplifi er
- Ground terminal
Description